Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48650 )
Change subject: mb/google/zork: Disable USB_OC0_L on transition to S3 ......................................................................
mb/google/zork: Disable USB_OC0_L on transition to S3
One of the second source USB charging port chips is erroneous triggering the overcurrent pin when we go into S3. Because this is used mainly to report the overcurrent situation to the OS and there is additional overcurrent protection, we can disable the function when the system goes into S3. It will get switched back to the overcurrent function when the system resumes.
BUG=b:175646274 TEST=Build. Still needs to be functionally tested BRANCH=Zork
Change-Id: I9d280c793a7989ebaa2fcc28531fe14e2adbfaef --- M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/48650/1
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index a2ad517..234cd7d 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -336,6 +336,9 @@ PAD_GPO(GPIO_40, LOW), /* EN_PWR_CAMERA */ PAD_GPO(GPIO_76, LOW), + /* USB_OC0_L - USB C0 + USB A0 */ + PAD_GPI(GPIO_16, PULL_NONE), + };
static const struct soc_amd_gpio gpio_fp_shutdown_table[] = { @@ -348,6 +351,9 @@ PAD_GPO(GPIO_11, LOW), /* EN_PWR_FP */ PAD_GPO(GPIO_32, LOW), + + /* USB_OC0_L - USB C0 + USB A0 */ + PAD_GPI(GPIO_16, PULL_NONE), };
const __weak struct soc_amd_gpio *variant_sleep_gpio_table(size_t *size, int slp_typ)