[coreboot-gerrit] Change in coreboot[master]: soc/mediatek/mt8192: Add ddp driver

[Yidi Lin (Code Review)]

Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46577 )

Change subject: soc/mediatek/mt8192: Add ddp driver
......................................................................

Patch Set 11:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46577/11/src/soc/mediatek/mt8192/dd... 
File src/soc/mediatek/mt8192/ddp.c:

https://review.coreboot.org/c/coreboot/+/46577/11/src/soc/mediatek/mt8192/dd... 
PS11, Line 45: static void ccorr_config(u32 width, u32 height)
             : {
             : 	struct disp_ccorr_regs *const regs = disp_ccorr;
             : 	int enable_relay = 0;
             : 
             : 	printk(BIOS_INFO, "%s\n", __func__);
             : 
             : 	write32(&regs->size, width << 16 | height);
             : 
             : 	if (enable_relay) {
             : 		setbits32(&regs->cfg, PQ_RELAY_MODE);
             : 		clrbits32(&regs->cfg, PQ_ENGINE_EN);
             : 	} else {
             : 		clrbits32(&regs->cfg, PQ_RELAY_MODE);
             : 		setbits32(&regs->cfg, PQ_ENGINE_EN);
             : 	}
             : 
             : 	write32(&regs->en, PQ_EN);
             : }
             : 
             : static void aal_config(u32 width, u32 height)
             : {
             : 	struct disp_aal_regs *const regs = disp_aal;
             : 	int enable_relay = 1;
             : 
             : 	printk(BIOS_INFO, "%s\n", __func__);
             : 
             : 	write32(&regs->size, width << 16 | height);
             : 	write32(&regs->output_size, width << 16 | height);
             : 
             : 	if (enable_relay) {
             : 		setbits32(&regs->cfg, PQ_RELAY_MODE);
             : 		clrbits32(&regs->cfg, PQ_ENGINE_EN);
             : 	} else {
             : 		clrbits32(&regs->cfg, PQ_RELAY_MODE);
             : 		setbits32(&regs->cfg, PQ_ENGINE_EN);
             : 	}
             : 
             : 	write32(&regs->en, PQ_EN);
             : }
             : 
             : static void gamma_config(u32 width, u32 height)
             : {
             : 	struct disp_gamma_regs *const regs = disp_gamma;
             : 	int enable_relay = 0;
             : 
             : 	printk(BIOS_INFO, "%s\n", __func__);
             : 
             : 	write32(&regs->size, width << 16 | height);
             : 
             : 	if (enable_relay)
             : 		setbits32(&regs->cfg, PQ_RELAY_MODE);
             : 	else
             : 		clrbits32(&regs->cfg, PQ_RELAY_MODE);
             : 
             : 	write32(&regs->en, PQ_EN);
             : }
             : 
             : static void postmask_config(u32 width, u32 height)
             : {
             : 	struct disp_postmask_regs *const regs = disp_postmask;
             : 	int enable_relay = 1;
             : 
             : 	printk(BIOS_INFO, "%s\n", __func__);
             : 
             : 	write32(&regs->size, width << 16 | height);
             : 
             : 	if (enable_relay)
             : 		setbits32(&regs->cfg, PQ_RELAY_MODE);
             : 	else
             : 		clrbits32(&regs->cfg, PQ_RELAY_MODE);
             : 
             : 	write32(&regs->en, PQ_EN);
             : }
             : 
             : static void dither_config(u32 width, u32 height)
             : {
             : 	struct disp_dither_regs *const regs = disp_dither;
             : 	int enable_relay = 1;
             : 
             : 	printk(BIOS_INFO, "%s\n", __func__);
             : 
             : 	write32(&regs->size, width << 16 | height);
             : 
             : 	if (enable_relay)
             : 		setbits32(&regs->cfg, PQ_RELAY_MODE);
             : 	else
             : 		clrbits32(&regs->cfg, PQ_RELAY_MODE);
             : 
             : 	write32(&regs->en, PQ_EN);
             : }
             :
> can we merge these just like the enable_pq in mt8183? […]

what about

struct disp_common_regs {
        u32 en;
        u32 reset;
        u32 inten;
        u32 intsta;
        union {
                struct {
                        u32 status;
                        u32 reserved0[3];
                };
                u32 reserved1[4];
        };
        u32 cfg;
        u32 reserved2[3];
        u32 size;
};

struct disp_ccorr_regs {
    struct disp_common_regs common;
    u32 reserved2[27];
    u32 shadow;
};

struct disp_aal_regs {
    struct disp_common_regs common;
    u32 reserved2[47];
    u32 shadow;
    u32 reserved3[249];
    u32 output_size;
};

...

then pass common registers to enable_pq() ?