[coreboot-gerrit] Change in coreboot[master]: soc/intel/broadwell: Fix 16-bit read/write PCI_COMMAND register

[HAOUAS Elyes (Code Review)]

Hello build bot (Jenkins), Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/40850

to look at the new patch set (#3).

Change subject: soc/intel/broadwell: Fix 16-bit read/write PCI_COMMAND register
......................................................................

soc/intel/broadwell: Fix 16-bit read/write PCI_COMMAND register

Change-Id: I0fd1a758d8838b3eea5640b41eee6a6893360aa3
Signed-off-by: Elyes HAOUAS 
---
M src/soc/intel/broadwell/adsp.c
M src/soc/intel/broadwell/hda.c
M src/soc/intel/broadwell/me.c
M src/soc/intel/broadwell/minihd.c
M src/soc/intel/broadwell/pch.c
M src/soc/intel/broadwell/pcie.c
M src/soc/intel/broadwell/serialio.c
M src/soc/intel/broadwell/smihandler.c
8 files changed, 25 insertions(+), 42 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/40850/3