HAOUAS Elyes uploaded patch set #3 to this change.

View Change

soc/intel/broadwell: Fix 16-bit read/write PCI_COMMAND register

Change-Id: I0fd1a758d8838b3eea5640b41eee6a6893360aa3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
---
M src/soc/intel/broadwell/adsp.c
M src/soc/intel/broadwell/hda.c
M src/soc/intel/broadwell/me.c
M src/soc/intel/broadwell/minihd.c
M src/soc/intel/broadwell/pch.c
M src/soc/intel/broadwell/pcie.c
M src/soc/intel/broadwell/serialio.c
M src/soc/intel/broadwell/smihandler.c
8 files changed, 25 insertions(+), 42 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/40850/3

To view, visit change 40850. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0fd1a758d8838b3eea5640b41eee6a6893360aa3
Gerrit-Change-Number: 40850
Gerrit-PatchSet: 3
Gerrit-Owner: HAOUAS Elyes <ehaouas@noos.fr>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: newpatchset