Hello Patrick Rudolph, Subrata Banik, Aamir Bohra, Wonkyu Kim, Maulik V Vaghela, Ravishankar Sarawadi, build bot (Jenkins), Shaunak Saha, Furquan Shaikh, Raj Astekar, Meera Ravindranath, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38147
to look at the new patch set (#19).
Change subject: soc/intel/tigerlake: Enable Audio on TGL
......................................................................
soc/intel/tigerlake: Enable Audio on TGL
Configure UPDs to support Audio enablement.
Correct the upd name in jslrvp devicetree to avoid compilation issue.
BUG=b:149467239
BRANCH=none
TEST=Build and boot tigerlake rvp board
Signed-off-by: Srinidhi N Kaushik srinidhi.n.kaushik@intel.com
Change-Id: Idd3927a33d303ed5a663b5b838f43ed4ebc7a0db
---
M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
M src/soc/intel/tigerlake/chip.h
M src/soc/intel/tigerlake/romstage/fsp_params_tgl.c
3 files changed, 25 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/38147/19
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Idd3927a33d303ed5a663b5b838f43ed4ebc7a0db
Gerrit-Change-Number: 38147
Gerrit-PatchSet: 19
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