[coreboot-gerrit] Change in coreboot[master]: mb/google/hatch: Add noise mitigation setting for dratini/jinlon

[Shelley Chen (Code Review)]

Shelley Chen has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38212 )

Change subject: mb/google/hatch: Add noise mitigation setting for dratini/jinlon
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mb/google/hatch: Add noise mitigation setting for dratini/jinlon

Enable acoustic noise mitigation, the slow slew rates are fast time divided by 8
and disable Fast PKG C State Ramp (IA, GT, SA).

BRANCH=hatch
BUG=b:143501884
TEST=build and verify that noise reduce.

Change-Id: I65f47288a7b1da98296fdba87ab5ca0c3a567aaf
Signed-off-by: Wisley Chen 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38212
Reviewed-by: Paul Menzel 
Reviewed-by: Tim Wawrzynczak 
Reviewed-by: Frans Hendriks 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/hatch/variants/dratini/overridetree.cb
M src/mainboard/google/hatch/variants/jinlon/overridetree.cb
2 files changed, 18 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Frans Hendriks: Looks good to me, but someone else must approve
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/mainboard/google/hatch/variants/dratini/overridetree.cb b/src/mainboard/google/hatch/variants/dratini/overridetree.cb
index f820629..5c30a5a 100644
--- a/src/mainboard/google/hatch/variants/dratini/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/dratini/overridetree.cb
@@ -17,6 +17,15 @@
    	[PchSerialIoIndexUART2] = PchSerialIoDisabled,
    }"

+	# VR Slew rate setting
+	register "AcousticNoiseMitigation" = "1"
+	register "SlowSlewRateForIa" = "2"
+	register "SlowSlewRateForGt" = "2"
+	register "SlowSlewRateForSa" = "2"
+	register "FastPkgCRampDisableIa" = "1"
+	register "FastPkgCRampDisableGt" = "1"
+	register "FastPkgCRampDisableSa" = "1"
+
    # Intel Common SoC Config
    #+-------------------+---------------------------+
    #| Field             |  Value                    |
diff --git a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
index c9613d2..f3f6c3b 100644
--- a/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/jinlon/overridetree.cb
@@ -17,6 +17,15 @@
    	[PchSerialIoIndexUART2] = PchSerialIoDisabled,
    }"

+	# VR Slew rate setting
+	register "AcousticNoiseMitigation" = "1"
+	register "SlowSlewRateForIa" = "2"
+	register "SlowSlewRateForGt" = "2"
+	register "SlowSlewRateForSa" = "2"
+	register "FastPkgCRampDisableIa" = "1"
+	register "FastPkgCRampDisableGt" = "1"
+	register "FastPkgCRampDisableSa" = "1"
+
    # Intel Common SoC Config
    #+-------------------+---------------------------+
    #| Field             |  Value                    |