[coreboot-gerrit] [XL] Change in coreboot[main]: mb/lenovo: Add ThinkCentre M920q (Cannon Lake)

[Angel Pons (Code Review)]

Attention is currently required from: Alexander Couzens, Maciej Pijanowski, Michał Kopeć, Paul Menzel.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80609?usp=email )

Change subject: mb/lenovo: Add ThinkCentre M920q (Cannon Lake)
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Patch Set 7:

(1 comment)

File src/mainboard/lenovo/m920q/romstage.c:

https://review.coreboot.org/c/coreboot/+/80609/comment/a4266c21_089a62f9 :
PS6, Line 33: 	/* Rcomp target values for CFL-S, DDR4 and 2 DIMMs per channel */
> Hmm indeed the docs don't have the values for CFL-S SODIMM 1DPC... […]

Ah, I remember a bit more: this number is read ODT, and it gets trained by MRC anyway. So, as long as it boots, I'd say it's fine.