Attention is currently required from: Alexander Couzens, Maciej Pijanowski, Michał Kopeć, Paul Menzel.

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1 comment:

• File src/mainboard/lenovo/m920q/romstage.c:

  • Patch Set #6, Line 33: /* Rcomp target values for CFL-S, DDR4 and 2 DIMMs per channel */

    Hmm indeed the docs don't have the values for CFL-S SODIMM 1DPC... […]

    Ah, I remember a bit more: this number is read ODT, and it gets trained by MRC anyway. So, as long as it boots, I'd say it's fine.

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