[coreboot-gerrit] Change in coreboot[master]: mb/pcengines/apu1: initialize serial port in bootblock

[Michał Żygowski (Code Review)]

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37332 )

Change subject: mb/pcengines/apu1: initialize serial port in bootblock
......................................................................

mb/pcengines/apu1: initialize serial port in bootblock

TEST=boot PC Engines apu1 with C bootblock patch and launch
Debian with Linux kernel 4.14.50

Signed-off-by: Michał Żygowski 
Change-Id: I36af6d3871a57f462a7508745663d9759de1c47d
---
A src/mainboard/pcengines/apu1/bootblock.c
M src/mainboard/pcengines/apu1/romstage.c
2 files changed, 26 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/37332/1

diff --git a/src/mainboard/pcengines/apu1/bootblock.c b/src/mainboard/pcengines/apu1/bootblock.c
new file mode 100644
index 0000000..5a3d97c
--- /dev/null
+++ b/src/mainboard/pcengines/apu1/bootblock.c
@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <device/pnp.h>
+#include <superio/nuvoton/common/nuvoton.h>
+#include <superio/nuvoton/nct5104d/nct5104d.h>
+
+#define SIO_PORT 0x2e
+#define SERIAL_DEV PNP_DEV(SIO_PORT, NCT5104D_SP1)
+
+
+void bootblock_mainboard_early_init(void)
+{
+	nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+}
diff --git a/src/mainboard/pcengines/apu1/romstage.c b/src/mainboard/pcengines/apu1/romstage.c
index 89bf304..134382f 100644
--- a/src/mainboard/pcengines/apu1/romstage.c
+++ b/src/mainboard/pcengines/apu1/romstage.c
@@ -61,5 +61,4 @@
 void board_BeforeAgesa(struct sysinfo *cb)
 {
    early_lpc_init();
-	nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 }