[coreboot-gerrit] Change in coreboot[master]: intel/fsp2_0: Move temporary RAM to .bss with FSP_USES_CB_STACK

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35233 )

Change subject: intel/fsp2_0: Move temporary RAM to .bss with FSP_USES_CB_STACK
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Patch Set 4:
> Patch Set 4:
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> Submit at your own discretion. I have no resources to improve this further wrt. allocation sizes or terminology.

I have to repeat what I wrote in CB:35165, I think in general FSP_USES_CB_STACK was a step to wrong direction wrt. amount of CAR space that is reserved. I did not look for argumentation or motivation for the change.

More importantly; the way car.ld is laid out requires DCACHE_BSP_STACK_SIZE parameter to stay constant across bootblock, verstage and romstage. Updates to FSP-M will not be allowed to have increased requirement for the stack size on systems with read-only bootblock.