[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event log

[Karthik Ramasubramanian (Code Review)]

Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47182 )

Change subject: soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event log
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Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47182/4/src/soc/intel/tigerlake/elo... 
File src/soc/intel/tigerlake/elog.c:

https://review.coreboot.org/c/coreboot/+/47182/4/src/soc/intel/tigerlake/elo... 
PS4, Line 51: uint32_t pme_status = pci_s_read_config32(
            : 			pme_map[i].devfn,
            : 			PCIE_ROOT_PORT_STATUS);
            : 
            : 		if (pme_status == 0xFFFFFFFF || !(pme_status & BIT(16)))
            : 			continue;
            : 
            : 		elog_add_event_wake(pme_map[i].wake_source, 0);
Not sure if you forgot to update the tigerlake in the same way as jasperlake.