Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46577 )
Change subject: soc/mediatek/mt8192: Add ddp driver ......................................................................
Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46577/11/src/soc/mediatek/mt8192/dd... File src/soc/mediatek/mt8192/ddp.c:
https://review.coreboot.org/c/coreboot/+/46577/11/src/soc/mediatek/mt8192/dd... PS11, Line 45: static void ccorr_config(u32 width, u32 height) : { : struct disp_ccorr_regs *const regs = disp_ccorr; : int enable_relay = 0; : : printk(BIOS_INFO, "%s\n", __func__); : : write32(®s->size, width << 16 | height); : : if (enable_relay) { : setbits32(®s->cfg, PQ_RELAY_MODE); : clrbits32(®s->cfg, PQ_ENGINE_EN); : } else { : clrbits32(®s->cfg, PQ_RELAY_MODE); : setbits32(®s->cfg, PQ_ENGINE_EN); : } : : write32(®s->en, PQ_EN); : } : : static void aal_config(u32 width, u32 height) : { : struct disp_aal_regs *const regs = disp_aal; : int enable_relay = 1; : : printk(BIOS_INFO, "%s\n", __func__); : : write32(®s->size, width << 16 | height); : write32(®s->output_size, width << 16 | height); : : if (enable_relay) { : setbits32(®s->cfg, PQ_RELAY_MODE); : clrbits32(®s->cfg, PQ_ENGINE_EN); : } else { : clrbits32(®s->cfg, PQ_RELAY_MODE); : setbits32(®s->cfg, PQ_ENGINE_EN); : } : : write32(®s->en, PQ_EN); : } : : static void gamma_config(u32 width, u32 height) : { : struct disp_gamma_regs *const regs = disp_gamma; : int enable_relay = 0; : : printk(BIOS_INFO, "%s\n", __func__); : : write32(®s->size, width << 16 | height); : : if (enable_relay) : setbits32(®s->cfg, PQ_RELAY_MODE); : else : clrbits32(®s->cfg, PQ_RELAY_MODE); : : write32(®s->en, PQ_EN); : } : : static void postmask_config(u32 width, u32 height) : { : struct disp_postmask_regs *const regs = disp_postmask; : int enable_relay = 1; : : printk(BIOS_INFO, "%s\n", __func__); : : write32(®s->size, width << 16 | height); : : if (enable_relay) : setbits32(®s->cfg, PQ_RELAY_MODE); : else : clrbits32(®s->cfg, PQ_RELAY_MODE); : : write32(®s->en, PQ_EN); : } : : static void dither_config(u32 width, u32 height) : { : struct disp_dither_regs *const regs = disp_dither; : int enable_relay = 1; : : printk(BIOS_INFO, "%s\n", __func__); : : write32(®s->size, width << 16 | height); : : if (enable_relay) : setbits32(®s->cfg, PQ_RELAY_MODE); : else : clrbits32(®s->cfg, PQ_RELAY_MODE); : : write32(®s->en, PQ_EN); : } : can we merge these just like the enable_pq in mt8183?
I know some bits have PQ_ENGINE_EN, and we can pass that as an extra arg:
static void enable_pq(struct disp_pq_regs *const regs, u32 width, u32 height, int enable_relay, int has_engine_en)