[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add PMC mux control

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )

Change subject: soc/intel/tigerlake: Add PMC mux control
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Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38777/4/src/soc/intel/tigerlake/acp... 
File src/soc/intel/tigerlake/acpi/pmc.asl:

https://review.coreboot.org/c/coreboot/+/38777/4/src/soc/intel/tigerlake/acp... 
PS4, Line 26: 0xFE000000
What is this address? Is this the p2sb address? And PMC is port 0 with 16KiB of space? this needs some commentary.