[coreboot-gerrit] Change in coreboot[master]: soc/intel/broadwell/pch/sata.c: Add missing SATA init steps

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47029 )

Change subject: soc/intel/broadwell/pch/sata.c: Add missing SATA init steps
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soc/intel/broadwell/pch/sata.c: Add missing SATA init steps

WildcatPoint-LP BIOS spec lists them, and are the same for Lynxpoint.
Keep the BWG comments for now, since both platforms will be merged soon.

Change-Id: Iba28c1591affafeb37097084c2fa58128974bd00
Signed-off-by: Angel Pons 
---
M src/soc/intel/broadwell/pch/sata.c
1 file changed, 9 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/47029/1

diff --git a/src/soc/intel/broadwell/pch/sata.c b/src/soc/intel/broadwell/pch/sata.c
index 91c2ff5..e9d70f1 100644
--- a/src/soc/intel/broadwell/pch/sata.c
+++ b/src/soc/intel/broadwell/pch/sata.c
@@ -95,6 +95,15 @@

/* Setup register 98h */
    reg32 = pci_read_config32(dev, 0x98);
+	reg32 |= 1 << 19;    /* BWG step 6 */
+	reg32 |= 1 << 22;    /* BWG step 5 */
+	reg32 &= ~(0x3f << 7);
+	reg32 |= 0x04 << 7;  /* BWG step 7 */
+	reg32 |= 1 << 20;    /* BWG step 8 */
+	reg32 &= ~(0x03 << 5);
+	reg32 |= 1 << 5;     /* BWG step 9 */
+	reg32 |= 1 << 18;    /* BWG step 10 */
+	reg32 |= 1 << 29;    /* BWG step 11 */
    reg32 &= ~((1 << 31) | (1 << 30));
    reg32 |= 1 << 23;
    reg32 |= 1 << 24; /* Enable MPHY Dynamic Power Gating */