Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47990 )
Change subject: soc/intel/common/fast_spi: Add extended decode window support ......................................................................
Patch Set 1:
(3 comments)
https://review.coreboot.org/c/coreboot/+/47990/1/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/fast_spi.c:
https://review.coreboot.org/c/coreboot/+/47990/1/src/soc/intel/common/block/... PS1, Line 251: /* Coreboot coding style requires: /* * Enable extended ... * ... * ... */
https://review.coreboot.org/c/coreboot/+/47990/1/src/soc/intel/common/block/... PS1, Line 278: Program obtained ext_bios_size in SPI_BAR_CONTROL Comment needs update. We will have to explain why 16 * MiB is being programmed here.
https://review.coreboot.org/c/coreboot/+/47990/1/src/soc/intel/common/block/... PS1, Line 284: dmi_enable_gpmr Since GPMR programming can fail, I am thinking that we should do that first and if the return value is success only then configure EXT_BIOS_BAR1 and decode enable, etc. What do you think?