3 comments:
File src/soc/intel/common/block/fast_spi/fast_spi.c:
Coreboot coding style requires:
/*
* Enable extended ...
* ...
* ...
*/
Patch Set #1, Line 278: Program obtained ext_bios_size in SPI_BAR_CONTROL
Comment needs update. We will have to explain why 16 * MiB is being programmed here.
Patch Set #1, Line 284: dmi_enable_gpmr
Since GPMR programming can fail, I am thinking that we should do that first and if the return value is success only then configure EXT_BIOS_BAR1 and decode enable, etc. What do you think?
To view, visit change 47990. To unsubscribe, or for help writing mail filters, visit settings.