8 Jan
2021
8 Jan
'21
11:10 a.m.
Attention is currently required from: Felix Singer. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49184 )
Change subject: mb/asrock/h110m: Fix HECI state in devicetree ......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/49184/comment/7f126a22_74d2c235 PS3, Line 9: making its state equal with the HeciEnabled : option
Just looked it after. It happens while `soc_finalize()`, after PCI enumeration. […]
Maybe just rename and invert `HeciEnabled` --> `HideHeci`?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I67a9f0a66bcc51c6153a76bfaaebdf1e7f07d55d
Gerrit-Change-Number: 49184
Gerrit-PatchSet: 5
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