Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44014 )
Change subject: src/soc/intel/common: Make top_of_ram till TOLUD region mmio_resource ......................................................................
Patch Set 9:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44014/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44014/3//COMMIT_MSG@15 PS3, Line 15: range as cacheable (+ reserved) and other ranges as reserve alone.
That is what I meant. […]
When CONFIG(USE_INTEL_FSP_MP_INIT) = y then that assumption breaks down looking at post_cpus_init() in src/soc/intel/common/block/cpu/mp_init.c
This is the problem today when user selects USE_INTEL_FSP_MP_INIT, we don't even run MTRR programming on MP and just booted to OS which is wrong, i have clarified that in other CL [https://review.coreboot.org/c/coreboot/+/44058/1/src/soc/intel/tigerlake/fsp...] will get this fixed soon
https://review.coreboot.org/c/coreboot/+/44014/8/src/soc/intel/common/block/... File src/soc/intel/common/block/systemagent/systemagent.c:
https://review.coreboot.org/c/coreboot/+/44014/8/src/soc/intel/common/block/... PS8, Line 146: *
It's probably best to replace this paragraph with the expected flow as discussed in the CL comments. […]
Done