Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45398 )
Change subject: soc/mediatek/mt8192: add pmif driver ......................................................................
Patch Set 1:
(10 comments)
https://review.coreboot.org/c/coreboot/+/45398/1/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pmif_spi.h:
https://review.coreboot.org/c/coreboot/+/45398/1/src/soc/mediatek/mt8192/inc... PS1, Line 89: SPI_CLK = 0x1,
code indent should use tabs where possible
please fix the tab below.
https://review.coreboot.org/c/coreboot/+/45398/1/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pmif_spmi.h:
https://review.coreboot.org/c/coreboot/+/45398/1/src/soc/mediatek/mt8192/inc... PS1, Line 27: 89 replace 89 by the real GPIO name.
https://review.coreboot.org/c/coreboot/+/45398/1/src/soc/mediatek/mt8192/inc... PS1, Line 27: SPMI_SCL_GPIO enum
https://review.coreboot.org/c/coreboot/+/45398/1/src/soc/mediatek/mt8192/inc... PS1, Line 89: {
open brace '{' following enum go on the same line
enum {
https://review.coreboot.org/c/coreboot/+/45398/1/src/soc/mediatek/mt8192/pmi... File src/soc/mediatek/mt8192/pmif.c:
https://review.coreboot.org/c/coreboot/+/45398/1/src/soc/mediatek/mt8192/pmi... PS1, Line 115: ((read32(&arb->mtk_pmif->init_done) & 0x1)) if (read32() & 0x1)
https://review.coreboot.org/c/coreboot/+/45398/1/src/soc/mediatek/mt8192/pmi... PS1, Line 157: int ret = 1; : : ret = pmif_clk_init(); : if (ret) : goto FAIL; : : ret = pmif_spmi_init(&pmif_spmi_arb[SPMI_MASTER_0]); : if (ret) : goto FAIL; : : ret = pmif_spi_init(&pmif_spi_arb[0]); : if (ret) : goto FAIL; : : return 0; : : FAIL: : /* assert(0); */ : return ret; int ret;
ret = pmif_clk_init(); if (!ret) ret = pmif_spmi_init(&pmif_spmi_arb[SPMI_MASTER_0]); if (!ret) ret = pmif_spi_init(&pmif_spi_arb[0]);
return ret;
https://review.coreboot.org/c/coreboot/+/45398/1/src/soc/mediatek/mt8192/pmi... File src/soc/mediatek/mt8192/pmif_clk.c:
https://review.coreboot.org/c/coreboot/+/45398/1/src/soc/mediatek/mt8192/pmi... PS1, Line 13: #define FREQ_260MHZ 260 : /* calibation miss rate, unit: 0.1% */ : #define CAL_MIS_RATE 40 : /* : * FREQ METER ID : * Ask clkmgr owner to find this information : * at clock table[fmeter]. : */ : #define FREQ_METER_ABIST_AD_OSC_CK 37 : #define CAL_MAX_VAL 0x7f use enum
https://review.coreboot.org/c/coreboot/+/45398/1/src/soc/mediatek/mt8192/pmi... PS1, Line 24: ID id
https://review.coreboot.org/c/coreboot/+/45398/1/src/soc/mediatek/mt8192/pmi... PS1, Line 31: )|( ) | (
https://review.coreboot.org/c/coreboot/+/45398/1/src/soc/mediatek/mt8192/pmi... PS1, Line 66: write32 consider SET32_BITFIELD?