Attention is currently required from: Dmitry Ponamorev, Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Kyösti Mälkki, Patrick Rudolph, King Sumo.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57194 )
Change subject: mb/teleplatforms/D4E4S16P8: Add CRB using intel/denverton_ns
......................................................................
Patch Set 26: Code-Review+1
(5 comments)
File src/mainboard/teleplatforms/D4E4S16P8/Kconfig:
https://review.coreboot.org/c/coreboot/+/57194/comment/e056a5cd_baba51e2
PS26, Line 10: select SUPPORT_CPU_UCODE_IN_CBFS
: select FSP_CAR
: select CPU_INTEL_COMMON
: select PARALLEL_MP_AP_WORK
: select SOC_INTEL_COMMON_BLOCK_FAST_SPI
Shouldn't these be selected by DNV-NS Kconfig?
File src/mainboard/teleplatforms/D4E4S16P8/acpi/mainboard_pci_irqs.asl:
https://review.coreboot.org/c/coreboot/+/57194/comment/a4661940_e6af7519
PS21, Line 3: board specific
Well it's coupled with devicetree. […]
Ack
File src/mainboard/teleplatforms/D4E4S16P8/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/57194/comment/9e60f6e2_16e81840
PS26, Line 49: 06
This device number is suspicious, isn't this downstream of the root port?
File src/mainboard/teleplatforms/D4E4S16P8/ramstage.c:
https://review.coreboot.org/c/coreboot/+/57194/comment/90c52d16_057d9d4b
PS21, Line 26: SMBUS_IO_BASE
This is ramstage, smbus_base() is romstage. […]
Ack
https://review.coreboot.org/c/coreboot/+/57194/comment/856b3d0b_a0cafd36
PS21, Line 28: (tmp < 0x20 || tmp > 0x7f)
Not sure if it looks like what you intended?
Looks good, thanks!
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