[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event log

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47182 )

Change subject: soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event log
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Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47182/2/src/soc/intel/tigerlake/elo... 
File src/soc/intel/tigerlake/elog.c:

https://review.coreboot.org/c/coreboot/+/47182/2/src/soc/intel/tigerlake/elo... 
PS2, Line 53: pci_dev_is_wake_source
> Ah yes, I see. It still compiles/links because we haven't added an elog_gsmi_cb... […]

That handler is present in this file on line 159. However, elog.c wasn't included in smm- until very recently. I see that the parent CL for this change doesn't include CB:47141 and that is probably why Jenkins doesn't complain.