Attention is currently required from: Alok Agarwal, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Paul Menzel, Pranava Y N, Subrata Banik, Vikrant L Jadeja.
Jérémy Compostella has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85454?usp=email )
Change subject: soc/intel/pantherlake: Display Sign-of-Life during memory training
......................................................................
Patch Set 14:
(5 comments)
Patchset:
PS11:
> What’s the difference to the implementation for other SoC types?
The UPD are being used a bit differently, especially at the moment. `VgaInitControl`, for instance, used to be a bit field.
Commit Message:
https://review.coreboot.org/c/coreboot/+/85454/comment/79f47875_60a21f57?us… :
PS11, Line 12: initialization
> Fits on the line above.
Indeed, I aligned my
https://review.coreboot.org/c/coreboot/+/85454/comment/8da3c729_53ce5132?us… :
PS11, Line 47: The SOC_INTEL_PANTHERLAKE_SIGN_OF_LIFE flag also selects the LZ4
: compression algorithm for the Video BIOS Tables (VBT), as LZMA
: decompression is not available by default during the romstage
: phase. Integrating LZMA support would increase the romstage binary
: size by an amount greater than the reduction achieved by compressing
: the VBT binary using LZMA.
> Please reflow for 72 characters per line.
Why 72-character ? According to https://doc.coreboot.org/contributing/gerrit_guidelines.html#commit-message… this is up to 75-character.
File src/soc/intel/pantherlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/85454/comment/4802956f_c7688aae?us… :
PS11, Line 420: SOC_INTEL_PANTHERLAKE_SIGN_OF_LIFE
> can you please rely on https://review.coreboot.org/c/coreboot/+/83770 Kconfig.
Done
File src/soc/intel/pantherlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/85454/comment/55475f79_6afb4e0b?us… :
PS11, Line 375:
> how about someone still using CSE sync in romstage ? (like non-CrOS usecase). […]
This is not supported in the current design. I raised the point in December.
I requested a mechanism for the bootloader (coreboot) to control VGA exit. Once available, I will push a new CL and update this function.
--
To view, visit https://review.coreboot.org/c/coreboot/+/85454?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I993eb0d59cd01fa62f35a77f84e262e389efb367
Gerrit-Change-Number: 85454
Gerrit-PatchSet: 14
Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com>
Gerrit-Reviewer: Alok Agarwal <alok.agarwal(a)intel.com>
Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>
Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Jayvik Desai <jayvik(a)google.com>
Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>
Gerrit-Attention: Subrata Banik <subratabanik(a)google.com>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Attention: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com>
Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>
Gerrit-Attention: Alok Agarwal <alok.agarwal(a)intel.com>
Gerrit-Comment-Date: Tue, 04 Feb 2025 17:02:25 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>
Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>
Attention is currently required from: Alok Agarwal, Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Pranava Y N, Vikrant L Jadeja.
Hello Alok Agarwal, Anil Kumar K, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik, Vikrant L Jadeja, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/85454?usp=email
to look at the new patch set (#14).
Change subject: soc/intel/pantherlake: Display Sign-of-Life during memory training
......................................................................
soc/intel/pantherlake: Display Sign-of-Life during memory training
This commit activates the Firmware Support Package (FSP) Memory
Sign-of-Life feature, which allows for the display of a
user-configurable text message on-screen during memory initialization.
This feature enhances the user experience by providing reassurance that
the memory training process is underway and may take some time.
The following FSP-M UPDs (Updateable Product Data) are utilized:
- VgaInitControl (boolean): Initializes graphics, establishes VGA text
mode, and centers the VgaMessage text on the screen. It clears the
screen, disables VGA text mode, and deactivates graphics upon exiting
the FSP-M (Firmware Support Package - Memory Initialization).
- VbtPtr (address): This is a pointer to the VBT (Video BIOS Table)
binary.
- VbtSize (unsigned integer): Indicates the size of the VBT binary.
- LidStatus (boolean): Given the limited resources available at early
boot stages, the text message is shown on a single monitor. The lid
status determines the most appropriate display to use:
- 0: If the lid is closed, display the text message on an external
display if one is available; otherwise, display nothing.
- 1: If the lid is open, display the message on the internal display;
if unavailable, default to an external display.
- VgaMessage (string): Specifies the text message to be displayed.
When the FSP_UGOP_EARLY_SIGN_OF_LIFE flag is set, coreboot is configured
to use the UPDs mentioned above to show a text message during the memory
training phase. This text message can be customized through the locale
text mechanism using the identifier memory_training_desc.
TEST="Enabling FSP-M Sign-of-Life" message is present in the log upon
the first boot, and a message is displayed on the screen while the
FSP performs MRC training.
Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com>
Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com>
Change-Id: I993eb0d59cd01fa62f35a77f84e262e389efb367
---
M src/soc/intel/pantherlake/romstage/fsp_params.c
1 file changed, 45 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/85454/14
--
To view, visit https://review.coreboot.org/c/coreboot/+/85454?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: newpatchset
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I993eb0d59cd01fa62f35a77f84e262e389efb367
Gerrit-Change-Number: 85454
Gerrit-PatchSet: 14
Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com>
Gerrit-Reviewer: Alok Agarwal <alok.agarwal(a)intel.com>
Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>
Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Jayvik Desai <jayvik(a)google.com>
Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>
Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com>
Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Attention: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com>
Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>
Gerrit-Attention: Alok Agarwal <alok.agarwal(a)intel.com>
Attention is currently required from: Alok Agarwal, Anil Kumar K, Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Pranava Y N, Vikrant L Jadeja.
Hello Alok Agarwal, Anil Kumar K, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik, Vikrant L Jadeja, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/85454?usp=email
to look at the new patch set (#13).
Change subject: soc/intel/pantherlake: Display Sign-of-Life during memory training
......................................................................
soc/intel/pantherlake: Display Sign-of-Life during memory training
This commit activates the Firmware Support Package (FSP) Memory
Sign-of-Life feature, which allows for the display of a
user-configurable text message on-screen during memory initialization.
This feature enhances the user experience by providing reassurance that
the memory training process is underway and may take some time.
The following FSP-M UPDs (Updateable Product Data) are utilized:
- VgaInitControl (boolean): Initializes graphics, establishes VGA text
mode, and centers the VgaMessage text on the screen. It clears the
screen, disables VGA text mode, and deactivates graphics upon exiting
the FSP-M (Firmware Support Package - Memory Initialization).
- VbtPtr (address): This is a pointer to the VBT (Video BIOS Table)
binary.
- VbtSize (unsigned integer): Indicates the size of the VBT binary.
- LidStatus (boolean): Given the limited resources available at early
boot stages, the text message is shown on a single monitor. The lid
status determines the most appropriate display to use:
- 0: If the lid is closed, display the text message on an external
display if one is available; otherwise, display nothing.
- 1: If the lid is open, display the message on the internal display;
if unavailable, default to an external display.
- VgaMessage (string): Specifies the text message to be displayed.
When the FSP_UGOP_EARLY_SIGN_OF_LIFE flag is set, coreboot is configured
to use the UPDs mentioned above to show a text message during the memory
training phase. This text message can be customized through the locale
text mechanism using the identifier memory_training_desc.
Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com>
Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com>
Change-Id: I993eb0d59cd01fa62f35a77f84e262e389efb367
---
M src/soc/intel/pantherlake/romstage/fsp_params.c
1 file changed, 45 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/85454/13
--
To view, visit https://review.coreboot.org/c/coreboot/+/85454?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: newpatchset
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I993eb0d59cd01fa62f35a77f84e262e389efb367
Gerrit-Change-Number: 85454
Gerrit-PatchSet: 13
Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com>
Gerrit-Reviewer: Alok Agarwal <alok.agarwal(a)intel.com>
Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com>
Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>
Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Jayvik Desai <jayvik(a)google.com>
Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com>
Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>
Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com>
Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Attention: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com>
Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>
Gerrit-Attention: Alok Agarwal <alok.agarwal(a)intel.com>
Attention is currently required from: Bao Zheng.
Maximilian Brune has posted comments on this change by Bao Zheng. ( https://review.coreboot.org/c/coreboot/+/84233?usp=email )
Change subject: amdfwtool: Add combo new layout for new family
......................................................................
Patch Set 10:
(1 comment)
File util/amdfwtool/amdfwtool.c:
https://review.coreboot.org/c/coreboot/+/84233/comment/c54520c1_33693706?us… :
PS10, Line 1585: static bool needs_new_combo_layout(enum platform soc_id)
: {
: return needs_ish(soc_id);
: }
I am a bit confused. According to this the "new combo layout" implies that we need an ISH. An ISH on the other implies that we are using the recovery a/b flash layout (as is written in `data_parse.c`). So `new_combo_layout` implies `recovery_ab` (transitive property). Which means we don't need the combo layout property right? We can just check if we have a recovery_ab layout.
--
To view, visit https://review.coreboot.org/c/coreboot/+/84233?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: If573cdeaeb56e95d2fed235c9337fab82d622757
Gerrit-Change-Number: 84233
Gerrit-PatchSet: 10
Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Reviewer: Zheng Bao
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com>
Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com>
Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com>
Gerrit-Comment-Date: Tue, 04 Feb 2025 16:57:24 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, John Su, Kapil Porwal, Nick Vaccaro.
Subrata Banik has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/86255?usp=email )
Change subject: mb/google/trulo/var/uldrenite: Add fw_config probe for Cellular
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/google/brya/variants/uldrenite/variant.c:
https://review.coreboot.org/c/coreboot/+/86255/comment/407d481b_21280945?us… :
PS1, Line 67: if (fw_config_probe(FW_CONFIG(DB_Cellular, Cellular_RW350R))) {
```
if (fw_config_probe(FW_CONFIG(DB_Cellular, Cellular_ABSENT)))
return;
```
--
To view, visit https://review.coreboot.org/c/coreboot/+/86255?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ib664f543c6012b44a0a604d0943416519d92a057
Gerrit-Change-Number: 86255
Gerrit-PatchSet: 1
Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com>
Gerrit-Reviewer: Eric Lai <ericllai(a)google.com>
Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com>
Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com>
Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com>
Gerrit-Attention: Jayvik Desai <jayvik(a)google.com>
Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com>
Gerrit-Attention: Eric Lai <ericllai(a)google.com>
Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com>
Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Comment-Date: Tue, 04 Feb 2025 16:55:31 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, John Su, Kapil Porwal, Nick Vaccaro.
Subrata Banik has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/86255?usp=email )
Change subject: mb/google/trulo/var/uldrenite: Add fw_config probe for Cellular
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/google/brya/variants/uldrenite/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/86255/comment/fbc96140_0e940c42?us… :
PS1, Line 3: Cellular_ABSENT
no camel casing please. use all character in CAPs
--
To view, visit https://review.coreboot.org/c/coreboot/+/86255?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ib664f543c6012b44a0a604d0943416519d92a057
Gerrit-Change-Number: 86255
Gerrit-PatchSet: 1
Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com>
Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com>
Gerrit-Reviewer: Eric Lai <ericllai(a)google.com>
Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com>
Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com>
Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com>
Gerrit-Attention: Jayvik Desai <jayvik(a)google.com>
Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com>
Gerrit-Attention: Eric Lai <ericllai(a)google.com>
Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com>
Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Comment-Date: Tue, 04 Feb 2025 16:54:43 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Attention is currently required from: Alok Agarwal, Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Pranava Y N, Vikrant L Jadeja.
Hello Alok Agarwal, Anil Kumar K, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik, Vikrant L Jadeja, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/85454?usp=email
to look at the new patch set (#12).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: soc/intel/pantherlake: Display Sign-of-Life during memory training
......................................................................
soc/intel/pantherlake: Display Sign-of-Life during memory training
This commit activates the Firmware Support Package (FSP) Memory
Sign-of-Life feature, which allows for the display of a user-configurable
text message on-screen during memory initialization. This feature enhances
the user experience by providing reassurance that the memory training
process is underway and may take some time.
The following FSP-M UPDs (Updateable Product Data) are utilized:
- VgaInitControl (boolean): Initializes graphics, establishes VGA text
mode, and centers the VgaMessage text on the screen. It clears the screen,
disables VGA text mode, and deactivates graphics upon exiting the
FSP-M (Firmware Support Package - Memory Initialization).
- VbtPtr (address): This is a pointer to the VBT (Video BIOS Table) binary.
- VbtSize (unsigned integer): Indicates the size of the VBT binary.
- LidStatus (boolean): Given the limited resources available at early boot
stages, the text message is shown on a single monitor. The lid status
determines the most appropriate display to use:
- 0: If the lid is closed, display the text message on an external
display if one is available; otherwise, display nothing.
- 1: If the lid is open, display the message on the internal display; if
unavailable, default to an external display.
- VgaMessage (string): Specifies the text message to be displayed.
When the FSP_UGOP_EARLY_SIGN_OF_LIFE flag is set, coreboot is configured to
use the UPDs mentioned above to show a text message during the memory
training phase. This text message can be customized through the locale text
mechanism using the identifier memory_training_desc.
Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com>
Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com>
Change-Id: I993eb0d59cd01fa62f35a77f84e262e389efb367
---
M src/soc/intel/pantherlake/romstage/fsp_params.c
1 file changed, 45 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/85454/12
--
To view, visit https://review.coreboot.org/c/coreboot/+/85454?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: newpatchset
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I993eb0d59cd01fa62f35a77f84e262e389efb367
Gerrit-Change-Number: 85454
Gerrit-PatchSet: 12
Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com>
Gerrit-Reviewer: Alok Agarwal <alok.agarwal(a)intel.com>
Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>
Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Jayvik Desai <jayvik(a)google.com>
Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>
Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com>
Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Attention: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com>
Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>
Gerrit-Attention: Alok Agarwal <alok.agarwal(a)intel.com>
Attention is currently required from: Intel coreboot Reviewers, Matt DeVillier.
Sean Rhodes has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/86275?usp=email )
Change subject: drivers/intel/gma: Fix alignment of extended VBT in opregion
......................................................................
Patch Set 1: Code-Review+1
--
To view, visit https://review.coreboot.org/c/coreboot/+/86275?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ib3784eea6eb929ffec9672fc123b833c11c057e8
Gerrit-Change-Number: 86275
Gerrit-PatchSet: 1
Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com>
Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>
Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems>
Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>
Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com>
Gerrit-Comment-Date: Tue, 04 Feb 2025 16:44:23 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Attention is currently required from: Intel coreboot Reviewers, Matt DeVillier.
Sean Rhodes has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/86276?usp=email )
Change subject: drivers/intel/gma: Don't advertise support for opregion mailbox #2
......................................................................
Patch Set 1: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/86276?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I8efcf9c5d384b6e0ce159d65cb1497c2e2e47f42
Gerrit-Change-Number: 86276
Gerrit-PatchSet: 1
Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com>
Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>
Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems>
Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>
Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com>
Gerrit-Comment-Date: Tue, 04 Feb 2025 16:42:12 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes