coreboot-gerrit February 2025

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[S] Change in blobs[main]: soc/mediatek/mt8196: Add libbl31.a version v1.0
by Yu-Ping Wu (Code Review) 12 Feb '25

12 Feb '25

Attention is currently required from: Gavin Liu, Jarried Lin. Yu-Ping Wu has posted comments on this change by Gavin Liu. ( https://review.coreboot.org/c/blobs/+/86382?usp=email ) Change subject: soc/mediatek/mt8196: Add libbl31.a version v1.0 ...................................................................... Patch Set 2: (11 comments) File soc/mediatek/mt8196/README.md: https://review.coreboot.org/c/blobs/+/86382/comment/e04b97a5_1eb63776?usp=e… : PS2, Line 287: Mediatek MediaTek https://review.coreboot.org/c/blobs/+/86382/comment/19405e11_e6afd877?usp=e… : PS2, Line 293: mminfra Uppercase https://review.coreboot.org/c/blobs/+/86382/comment/366a140e_70294293?usp=e… : PS2, Line 294: smmu_sid Should this be uppercase as well (something like `SMMU SID`)? https://review.coreboot.org/c/blobs/+/86382/comment/7b8b59c7_ced425dc?usp=e… : PS2, Line 296: use uses https://review.coreboot.org/c/blobs/+/86382/comment/cc64097e_44305423?usp=e… : PS2, Line 297: ARM-Trusted-Firmware links `libbl31.a` when building `bl31.elf`. ``` By specifying the `MTKLIB_PATH=libbl31.a` make variable when building BL31, the library will be linked with `bl31.elf`. ``` https://review.coreboot.org/c/blobs/+/86382/comment/d676ccb2_63c6df60?usp=e… : PS2, Line 298: Missing `## Version` section, which is a requirement for all upstream blobs. File soc/mediatek/mt8196/libbl31.a: PS2: Fix executable file mode. File soc/mediatek/mt8196/libbl31.a.md5: https://review.coreboot.org/c/blobs/+/86382/comment/f7db1869_ed6e557e?usp=e… : PS2, Line 2: extra blank line File soc/mediatek/mt8196/libbl31_release_note.txt: https://review.coreboot.org/c/blobs/+/86382/comment/eeb5f777_1ce290a4?usp=e… : PS2, Line 1: 1.0 Can we use the latest version 16174.X.0 from FW branch? https://review.coreboot.org/c/blobs/+/86382/comment/5f717714_5e399c5c?usp=e… : PS2, Line 5: Include Included https://review.coreboot.org/c/blobs/+/86382/comment/b1dd9c4d_7d8261a1?usp=e… : PS2, Line 7: - CL:*8004008 feat(mt8196): add MT8196 UFS driver Sort from latest to the oldest (just like git log output)? -- To view, visit https://review.coreboot.org/c/blobs/+/86382?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: Ided5b662464be64cb8d9db938eb513ac7b1d6e18 Gerrit-Change-Number: 86382 Gerrit-PatchSet: 2 Gerrit-Owner: Gavin Liu <gavin.liu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Gavin Liu <gavin.liu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Wed, 12 Feb 2025 15:49:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: device/pci_rom: Use correct endian conversion
by Patrick Rudolph (Code Review) 12 Feb '25

12 Feb '25

Patrick Rudolph has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/86383?usp=email ) Change subject: device/pci_rom: Use correct endian conversion ...................................................................... device/pci_rom: Use correct endian conversion The Option ROM contains lots of 16bit values that are being used, thus use the 16bit endianness conversion function over the 32bit variant to avoid confusion. TEST: Still works on amd/birman+. Change-Id: I571be97a930ad018e1d1316117cefe5bd1c68f9b Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/device/pci_rom.c 1 file changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/86383/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86383?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I571be97a930ad018e1d1316117cefe5bd1c68f9b Gerrit-Change-Number: 86383 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>

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[M] Change in coreboot[main]: device/pci_rom: Keep track of VBIOS
by Patrick Rudolph (Code Review) 12 Feb '25

12 Feb '25

Patrick Rudolph has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/86385?usp=email ) Change subject: device/pci_rom: Keep track of VBIOS ...................................................................... device/pci_rom: Keep track of VBIOS Currently the VBIOS is placed somewhere in DRAM when necessary. While generating ACPI tables the code attempts to find the VBIOS by looking at "known" places. Simplify the code and keep track of the VBIOS using a pointer in struct device by filling it in pci_rom_load(). The following patches will reuse this pointer to generalize the code even more. Change-Id: Ib27d30e3b07740d6098d4f7a5c4f5d8bce976f00 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/device/pci_rom.c M src/include/device/device.h 2 files changed, 59 insertions(+), 55 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/86385/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86385?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib27d30e3b07740d6098d4f7a5c4f5d8bce976f00 Gerrit-Change-Number: 86385 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: device/pci_rom: Move VBIOS checksum fix
by Patrick Rudolph (Code Review) 12 Feb '25

12 Feb '25

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier. Hello Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86384?usp=email to look at the new patch set (#2). Change subject: device/pci_rom: Move VBIOS checksum fix ...................................................................... device/pci_rom: Move VBIOS checksum fix Move the VBIOS checksum code into the soc/amd folder, as it's specific to AMD's FSP. The code now fixes the VBIOS in place instead only fixing it for the VFCT table. TEST: VBIOS has correct checksum after loading in BS_DEV_RESOURCES. VBIOS checksum is invalid entering graphics_dev_init(). VBIOS checksum is correct leaving graphics_dev_init(). Change-Id: I63aaaefaf01ea456e2ed39cd0891e552a7fb5135 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/device/pci_rom.c M src/soc/amd/common/fsp/fsp_graphics.c 2 files changed, 20 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/86384/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86384?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I63aaaefaf01ea456e2ed39cd0891e552a7fb5135 Gerrit-Change-Number: 86384 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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[S] Change in coreboot[main]: soc/amd/common/block/graphics: Support non VGA IGDs
by Patrick Rudolph (Code Review) 12 Feb '25

12 Feb '25

Attention is currently required from: Ana Carolina Cabral, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier. Patrick Rudolph has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/86300?usp=email ) Change subject: soc/amd/common/block/graphics: Support non VGA IGDs ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > sounds good to me Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86300?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6ab28aab74f3169d45d7d852a37ddfcfc75b7c88 Gerrit-Change-Number: 86300 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 12 Feb 2025 15:41:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

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[S] Change in blobs[main]: soc/mediatek/mt8196: update mtk_fsp_ramstage to version: 16189.0.0
by Yu-Ping Wu (Code Review) 12 Feb '25

12 Feb '25

Attention is currently required from: Jarried Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/blobs/+/86380?usp=email ) Change subject: soc/mediatek/mt8196: update mtk_fsp_ramstage to version: 16189.0.0 ...................................................................... Patch Set 2: (5 comments) Commit Message: https://review.coreboot.org/c/blobs/+/86380/comment/381656cc_ebc180f6?usp=e… : PS2, Line 7: 16189.0.0 Why not use the binary built from the ChromeOS FW branch, which should be more stable? https://review.coreboot.org/c/blobs/+/86380/comment/86b9af55_b351365f?usp=e… : PS2, Line 7: update mtk_fsp_ramstage to version: 16189.0.0 `Update mtk_fsp_ramstage to 16189.0.0` https://review.coreboot.org/c/blobs/+/86380/comment/aad3f6b1_ea4f09f8?usp=e… : PS2, Line 13: rauru We don't need this in the rauru FW branch, because ChromeOS builds always build mtk-fsp from source. File soc/mediatek/mt8196/mtk_fsp_ramstage_release_notes.txt: https://review.coreboot.org/c/blobs/+/86380/comment/e1ba2a64_0e985b9d?usp=e… : PS2, Line 5: Include Included https://review.coreboot.org/c/blobs/+/86380/comment/f51c8c97_c685a42e?usp=e… : PS2, Line 7: - CL:*7980492 mt8196/kraken_v3: Call dsb() after writing to CSRAM The CL order in the v1.0 release notes is the opposite: from latest to oldest. Please be consistent. -- To view, visit https://review.coreboot.org/c/blobs/+/86380?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: Ic785a04e576065a250f55a78105abf42b61a15a7 Gerrit-Change-Number: 86380 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Wed, 12 Feb 2025 15:40:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: security: Allow vboot when INTEL_TXT enabled
by Krystian Hebel (Code Review) 12 Feb '25

12 Feb '25

Attention is currently required from: Christian Walter, Filip Lewiński, Michał Żygowski. Krystian Hebel has posted comments on this change by Filip Lewiński. ( https://review.coreboot.org/c/coreboot/+/82695?usp=email ) Change subject: security: Allow vboot when INTEL_TXT enabled ...................................................................... Patch Set 15: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82695?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I19dc3d910c23fcfd8732465c488f47dd86a96781 Gerrit-Change-Number: 82695 Gerrit-PatchSet: 15 Gerrit-Owner: Filip Lewiński <filip.lewinski(a)3mdeb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Filip Lewiński <filip.lewinski(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Comment-Date: Wed, 12 Feb 2025 15:39:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/amd/birman_plus: Use actual flash size of 64 MiB instead of 16 MiB
by Patrick Rudolph (Code Review) 12 Feb '25

12 Feb '25

Attention is currently required from: Maximilian Brune, Paul Menzel. Patrick Rudolph has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/86179?usp=email ) Change subject: mb/amd/birman_plus: Use actual flash size of 64 MiB instead of 16 MiB ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86179/comment/5ebbb934_a0445336?us… : PS1, Line 7: Fix flash size > Maybe: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86179?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I72e3dcb0c3a308c3b0fd981b56cc7c1ef60095cc Gerrit-Change-Number: 86179 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Wed, 12 Feb 2025 15:36:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: mb/amd/birman_plus: Add SMMSTORE to FMAP
by Patrick Rudolph (Code Review) 12 Feb '25

12 Feb '25

Attention is currently required from: Maximilian Brune. Patrick Rudolph has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/86177?usp=email ) Change subject: mb/amd/birman_plus: Add SMMSTORE to FMAP ...................................................................... Patch Set 1: (1 comment) File src/mainboard/amd/birman_plus/board_glinda.fmd: https://review.coreboot.org/c/coreboot/+/86177/comment/1adc02ac_0b031af8?us… : PS1, Line 6: @15616K > Is the location necessary? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86177?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I661fcc55bf30aa6f1f3cc8a57e6d0eaf2fed4621 Gerrit-Change-Number: 86177 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Wed, 12 Feb 2025 15:36:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com>

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[XS] Change in coreboot[main]: mb/amd/birman_plus: Add SMMSTORE to FMAP
by Patrick Rudolph (Code Review) 12 Feb '25

12 Feb '25

Attention is currently required from: Maximilian Brune, Patrick Rudolph. Hello Maximilian Brune, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86177?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+2 by Maximilian Brune, Verified+1 by build bot (Jenkins) Change subject: mb/amd/birman_plus: Add SMMSTORE to FMAP ...................................................................... mb/amd/birman_plus: Add SMMSTORE to FMAP Add the SMMSTORE region to the default FMAP to allow building for EDK2 as payload. TEST: Still boots on AMD/Birman+ Change-Id: I661fcc55bf30aa6f1f3cc8a57e6d0eaf2fed4621 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/mainboard/amd/birman_plus/board_glinda.fmd 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/86177/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86177?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I661fcc55bf30aa6f1f3cc8a57e6d0eaf2fed4621 Gerrit-Change-Number: 86177 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com>

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