coreboot-gerrit February 2025

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[XS] Change in coreboot[main]: driver/usb/intel_bluetooth: Set BTRK to NotSerialized
by Sean Rhodes (Code Review) 19 Feb '25

19 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86505?usp=email ) Change subject: driver/usb/intel_bluetooth: Set BTRK to NotSerialized ...................................................................... driver/usb/intel_bluetooth: Set BTRK to NotSerialized This method calls STXS and CTXS, which are both serialized so this method itself does not need to be serialized. Change-Id: I6d9d6d3b765bba918c08f64458bd1fdad18eff18 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86505 Reviewed-by: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/usb/acpi/intel_bluetooth.c 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: Matt DeVillier: Looks good to me, approved Andy Ebrahiem: Looks good to me, but someone else must approve build bot (Jenkins): Verified diff --git a/src/drivers/usb/acpi/intel_bluetooth.c b/src/drivers/usb/acpi/intel_bluetooth.c index 2678d52..a979b42 100644 --- a/src/drivers/usb/acpi/intel_bluetooth.c +++ b/src/drivers/usb/acpi/intel_bluetooth.c @@ -311,7 +311,7 @@ acpigen_pop_len(); /* - * Method (BTRK, 1, Serialized) + * Method (BTRK, 1, NotSerialized) * { * If (Arg0 == 1) * { @@ -321,7 +321,7 @@ * } * } */ - acpigen_write_method_serialized("BTRK", 1); + acpigen_write_method("BTRK", 1); { acpigen_write_if_lequal_op_int(ARG0_OP, 1); { -- To view, visit https://review.coreboot.org/c/coreboot/+/86505?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6d9d6d3b765bba918c08f64458bd1fdad18eff18 Gerrit-Change-Number: 86505 Gerrit-PatchSet: 6 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: drivers/usb/acpi: Make SBTE Method NotSerialized
by Sean Rhodes (Code Review) 19 Feb '25

19 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86504?usp=email ) Change subject: drivers/usb/acpi: Make SBTE Method NotSerialized ...................................................................... drivers/usb/acpi: Make SBTE Method NotSerialized This method calls STXS and CTXS, which are both serialized so this method itself does not need to be serialized. Change-Id: Ia46eaa8746bcff5a57831c14a2845139116b01da Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86504 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-by: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> --- M src/drivers/usb/acpi/intel_bluetooth.c 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Andy Ebrahiem: Looks good to me, but someone else must approve Matt DeVillier: Looks good to me, approved diff --git a/src/drivers/usb/acpi/intel_bluetooth.c b/src/drivers/usb/acpi/intel_bluetooth.c index d83bcb2..2678d52 100644 --- a/src/drivers/usb/acpi/intel_bluetooth.c +++ b/src/drivers/usb/acpi/intel_bluetooth.c @@ -267,7 +267,7 @@ acpigen_write_mutex("CNMT", 0); /* - * Method (SBTE, 1, Serialized) + * Method (SBTE, 1, NotSerialized) * { * If (Arg0 == 1) * { @@ -277,7 +277,7 @@ * } * } */ - acpigen_write_method_serialized("SBTE", 1); + acpigen_write_method("SBTE", 1); { if (enable_gpio) { acpigen_write_if_lequal_op_int(ARG0_OP, 1); -- To view, visit https://review.coreboot.org/c/coreboot/+/86504?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia46eaa8746bcff5a57831c14a2845139116b01da Gerrit-Change-Number: 86504 Gerrit-PatchSet: 6 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: drivers/usb/intel_bluetooth: Make AOLD Method NotSerialized
by Sean Rhodes (Code Review) 19 Feb '25

19 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86503?usp=email ) Change subject: drivers/usb/intel_bluetooth: Make AOLD Method NotSerialized ...................................................................... drivers/usb/intel_bluetooth: Make AOLD Method NotSerialized This method only returns a package, so it does not need to be serialized. Change-Id: I5e61e92b0cffb28aaa070db3e9e8e2ff0e7c4251 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86503 Reviewed-by: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/drivers/usb/acpi/intel_bluetooth.c 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: Andy Ebrahiem: Looks good to me, but someone else must approve Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/drivers/usb/acpi/intel_bluetooth.c b/src/drivers/usb/acpi/intel_bluetooth.c index 5794a5b..d83bcb2 100644 --- a/src/drivers/usb/acpi/intel_bluetooth.c +++ b/src/drivers/usb/acpi/intel_bluetooth.c @@ -230,7 +230,7 @@ acpigen_pop_len(); /* - * Method (AOLD, 0, Serialized) + * Method (AOLD, 0, NotSerialized) * { * Name (AODS, Package (0x03) * { @@ -242,7 +242,7 @@ * Return (AODS) * } */ - acpigen_write_method_serialized("AOLD", 0); + acpigen_write_method("AOLD", 0); { acpigen_write_name("AODS"); acpigen_write_package(3); -- To view, visit https://review.coreboot.org/c/coreboot/+/86503?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5e61e92b0cffb28aaa070db3e9e8e2ff0e7c4251 Gerrit-Change-Number: 86503 Gerrit-PatchSet: 4 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/{lite_adl,byte_adl}: Disable CNVi Audio Offload
by Sean Rhodes (Code Review) 19 Feb '25

19 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86502?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/starlabs/{lite_adl,byte_adl}: Disable CNVi Audio Offload ...................................................................... mb/starlabs/{lite_adl,byte_adl}: Disable CNVi Audio Offload Both of these boards use the Intel 9560, which does not support audio offload so configure it accordingly. Change-Id: Idcdbd7cc83eda50ece74ce823bef60b16b49600c Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86502 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb M src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb 2 files changed, 0 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb b/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb index 6ba3e7d..bbedc96 100644 --- a/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb +++ b/src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb @@ -2,7 +2,6 @@ # FSP UPDs register "enable_c6dram" = "true" register "eist_enable" = "true" - register "cnvi_bt_audio_offload" = "true" register "cnvi_bt_core" = "true" register "sagv" = "SaGv_Enabled" @@ -123,7 +122,6 @@ register "type" = "UPC_TYPE_INTERNAL" register "group" = "ACPI_PLD_GROUP(0, 5)" register "is_intel_bluetooth" = "1" - register "cnvi_bt_audio_offload" = "1" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_VGPIO_0)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A13)" device ref usb2_port10 on end diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb index 16603f3..0c9b7a5 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb @@ -1,6 +1,5 @@ chip soc/intel/alderlake # FSP UPDs - register "cnvi_bt_audio_offload" = "true" register "cnvi_bt_core" = "true" register "enable_c6dram" = "true" register "eist_enable" = "true" @@ -108,7 +107,6 @@ register "desc" = ""CNVi Bluetooth"" register "type" = "UPC_TYPE_INTERNAL" register "is_intel_bluetooth" = "1" - register "cnvi_bt_audio_offload" = "1" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_VGPIO_0)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A13)" register "group" = "ACPI_PLD_GROUP(0, 5)" -- To view, visit https://review.coreboot.org/c/coreboot/+/86502?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idcdbd7cc83eda50ece74ce823bef60b16b49600c Gerrit-Change-Number: 86502 Gerrit-PatchSet: 4 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: drivers/usb/intel_bluetooth: Use correct function to close scope
by Sean Rhodes (Code Review) 19 Feb '25

19 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86500?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: drivers/usb/intel_bluetooth: Use correct function to close scope ...................................................................... drivers/usb/intel_bluetooth: Use correct function to close scope The scope should be closed with `acpigen_write_scope_end`, rather than `acpigen_pop_len`. Change-Id: I80df2ee1b51d7dbba85e556bee0fd7513ac933bb Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86500 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/usb/acpi/intel_bluetooth.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/drivers/usb/acpi/intel_bluetooth.c b/src/drivers/usb/acpi/intel_bluetooth.c index 4cefcf2..5794a5b 100644 --- a/src/drivers/usb/acpi/intel_bluetooth.c +++ b/src/drivers/usb/acpi/intel_bluetooth.c @@ -352,5 +352,5 @@ } acpigen_pop_len(); - acpigen_pop_len(); + acpigen_write_scope_end(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/86500?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I80df2ee1b51d7dbba85e556bee0fd7513ac933bb Gerrit-Change-Number: 86500 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: src/acpi/acpigen: Increase LENSTACK_SIZE from 10 to 15
by Sean Rhodes (Code Review) 19 Feb '25

19 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86427?usp=email ) ( 3 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: src/acpi/acpigen: Increase LENSTACK_SIZE from 10 to 15 ...................................................................... src/acpi/acpigen: Increase LENSTACK_SIZE from 10 to 15 Some upcoming patches run up against the existing limit, which was added 16 years ago without any justification as to the size. Bump the size from 10 to 15, to prevent tripping the runtime assertion. TEST=Tested with rest of patch train Change-Id: I8362b3a63a23bea0ce47920e5d41cd2535dbc084 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86427 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/acpi/acpigen.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Sean Rhodes: Looks good to me, but someone else must approve build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved diff --git a/src/acpi/acpigen.c b/src/acpi/acpigen.c index f682522..7d24b9e 100644 --- a/src/acpi/acpigen.c +++ b/src/acpi/acpigen.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* How much nesting do we support? */ -#define ACPIGEN_LENSTACK_SIZE 10 +#define ACPIGEN_LENSTACK_SIZE 15 /* If you need to change this, change acpigen_pop_len too */ #define ACPIGEN_RSVD_PKGLEN_BYTES 3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86427?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8362b3a63a23bea0ce47920e5d41cd2535dbc084 Gerrit-Change-Number: 86427 Gerrit-PatchSet: 5 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/trulo/var/uldrenite: Decrease ROM size to 16MB
by John Su (Code Review) 19 Feb '25

19 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik. John Su has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/86501?usp=email ) Change subject: mb/trulo/var/uldrenite: Decrease ROM size to 16MB ...................................................................... Patch Set 2: (2 comments) This change is ready for review. Commit Message: https://review.coreboot.org/c/coreboot/+/86501/comment/8c23feca_fe6b438a?us… : PS1, Line 7: Change > Decrease Done https://review.coreboot.org/c/coreboot/+/86501/comment/a4996d05_ee2ccd6e?us… : PS1, Line 9: Change Uldrenite ROM size from 32MB to 16MB. > Why? According to the design, the SPI ROM will be replaced with a 16MB size, so the Kconfig is modified to 16MB. -- To view, visit https://review.coreboot.org/c/coreboot/+/86501?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3ef1aa2401d44259e4301f65e2ba0ac7b9418bbd Gerrit-Change-Number: 86501 Gerrit-PatchSet: 2 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 19 Feb 2025 08:21:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[L] Change in coreboot[main]: mb/google/nissa/var/meliks: Copy pirrha’s overridetree as initial one
by SH Kim (Code Review) 18 Feb '25

18 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik. SH Kim has posted comments on this change by SH Kim. ( https://review.coreboot.org/c/coreboot/+/86377?usp=email ) Change subject: mb/google/nissa/var/meliks: Copy pirrha’s overridetree as initial one ...................................................................... Patch Set 6: (3 comments) File src/mainboard/google/brya/variants/meliks/overridetree.cb: https://review.coreboot.org/c/coreboot/+/86377/comment/da5d32bf_8d0d1841?us… : PS5, Line 269: probed > `detect` Done https://review.coreboot.org/c/coreboot/+/86377/comment/cb9d4ae1_ced3f12a?us… : PS5, Line 271: 200 > Higher values can affect boot/resume time. […] This value was from Bugzzy since Meliks uses the same touch screen IC as Bugzzy. As we checked we need 200 ms for this touch device for the touch HID to be ready. - https://review.coreboot.org/c/coreboot/+/60273 https://review.coreboot.org/c/coreboot/+/86377/comment/e297cc8a_10f3c389?us… : PS5, Line 275: 0x4F > It is always hex. No need of prefix "0x". Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86377?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifd6dfbeca7276dbacd72f9145ed7119566c8faef Gerrit-Change-Number: 86377 Gerrit-PatchSet: 6 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 19 Feb 2025 06:54:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com>

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[M] Change in coreboot[main]: mb/google/nissa/var/meliks: Update GPIO configuration
by Kapil Porwal (Code Review) 18 Feb '25

18 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Nick Vaccaro, SH Kim. Kapil Porwal has posted comments on this change by SH Kim. ( https://review.coreboot.org/c/coreboot/+/86378?usp=email ) Change subject: mb/google/nissa/var/meliks: Update GPIO configuration ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86378?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I33e1e3be5f2530feb396e7413f3f0cd75d5f38ca Gerrit-Change-Number: 86378 Gerrit-PatchSet: 3 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 19 Feb 2025 06:39:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/google/nissa/var/meliks: Update memory DQ/DQS map
by Kapil Porwal (Code Review) 18 Feb '25

18 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Lawrence Chang, Nick Vaccaro, SH Kim. Kapil Porwal has posted comments on this change by SH Kim. ( https://review.coreboot.org/c/coreboot/+/86376?usp=email ) Change subject: mb/google/nissa/var/meliks: Update memory DQ/DQS map ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86376?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iae3f2c65b4d1004d1d9ebf76b099fc7f50e8365f Gerrit-Change-Number: 86376 Gerrit-PatchSet: 2 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Wed, 19 Feb 2025 06:37:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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coreboot-gerrit February 2025