coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: mb/google/rauru: Determine PCIe init by storage type
by Yu-Ping Wu (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/85828?usp=email ) Change subject: mb/google/rauru: Determine PCIe init by storage type ...................................................................... Patch Set 3: (2 comments) File src/mainboard/google/rauru/mainboard.c: https://review.coreboot.org/c/coreboot/+/85828/comment/93132861_56f5fd4b?us… : PS2, Line 52: return storage_id() == 3; > That's it. Acknowledged File src/mainboard/google/rauru/mainboard.c: https://review.coreboot.org/c/coreboot/+/85828/comment/f874273e_248ea95e?us… : PS3, Line 72: _BASE_TYPE_NVME Variables starting with `_` are private to that file. Use `STORAGE_NVME` here. Or, if you'd like to make it more general, rename `_BASE_TYPE` to `STORAGE_BASE_TYPE`, rename `_BASE_TYPE_NVME` to `STORAGE_BASE_TYPE_NVME`, and write `STORAGE_BASE_TYPE(mainboard_get_storage_type()) == STORAGE_BASE_TYPE_NVME` here. Or, add `mainboard_storage_is_nvme()`. -- To view, visit https://review.coreboot.org/c/coreboot/+/85828?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaee7c346f4eaf004437aed3554d9275c9b821ad8 Gerrit-Change-Number: 85828 Gerrit-PatchSet: 3 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 09:32:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: mb/google/rauru: Implement mainboard_get_storage_type
by Yu-Ping Wu (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/85879?usp=email ) Change subject: mb/google/rauru: Implement mainboard_get_storage_type ...................................................................... Patch Set 1: (2 comments) File src/mainboard/google/rauru/mainboard.c: https://review.coreboot.org/c/coreboot/+/85879/comment/2677deca_882dd83b?us… : PS1, Line 65: DEBUG ERROR or WARN https://review.coreboot.org/c/coreboot/+/85879/comment/e24947a4_3ce55415?us… : PS1, Line 65: type storage id -- To view, visit https://review.coreboot.org/c/coreboot/+/85879?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I28e0e4294c9a44f1eb17147928ef2860227ff7d3 Gerrit-Change-Number: 85879 Gerrit-PatchSet: 1 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 09:25:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/mediatek/common: Get storage type from mainboard
by Yu-Ping Wu (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/85878?usp=email ) Change subject: soc/mediatek/common: Get storage type from mainboard ...................................................................... Patch Set 1: (2 comments) File src/soc/mediatek/common/include/soc/storage.h: https://review.coreboot.org/c/coreboot/+/85878/comment/0dc33ea5_265d757f?us… : PS1, Line 6: NvME NVMe? https://review.coreboot.org/c/coreboot/+/85878/comment/752ed915_3deeb040?us… : PS1, Line 15: tab -- To view, visit https://review.coreboot.org/c/coreboot/+/85878?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5dba2b54b29a701b825fb9bfcac74eb45a563d71 Gerrit-Change-Number: 85878 Gerrit-PatchSet: 1 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 09:23:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Delay 0.5ms after enabling PMIF SPMI SW interface
by Yu-Ping Wu (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hope Wang, Hung-Te Lin, Jarried Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85799?usp=email ) Change subject: soc/mediatek/mt8196: Delay 0.5ms after enabling PMIF SPMI SW interface ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85799?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I63df384061e4ed2629238f1843decd18d1ad1ac4 Gerrit-Change-Number: 85799 Gerrit-PatchSet: 5 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 09:18:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XL] Change in coreboot[main]: soc/mediatek/common/dp: Move common functions to dptx_common.c
by Yu-Ping Wu (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/85860?usp=email ) Change subject: soc/mediatek/common/dp: Move common functions to dptx_common.c ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85860?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic5074feee9efa62f27c118eaf7adb25875ba4c16 Gerrit-Change-Number: 85860 Gerrit-PatchSet: 5 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 09:18:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/mediatek/common/dp: Initialize dptx_misc
by Yu-Ping Wu (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/85877?usp=email ) Change subject: soc/mediatek/common/dp: Initialize dptx_misc ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85877?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I80e0f83f238d9b4c1ed0e1d1b219f4fb89a6cd22 Gerrit-Change-Number: 85877 Gerrit-PatchSet: 1 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 09:16:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/starlabs/*: Configure GPIO UPDs for eSPI
by Sean Rhodes (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/85691?usp=email ) Change subject: mb/starlabs/*: Configure GPIO UPDs for eSPI ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85691/comment/69ab8b47_519e28cf?us… : PS6, Line 9: FSP defaults to using pins that are used for LPC; given that : coreboot and these boards only supports eSPI, set these pins : accordingly. > what's the end result of setting these vs not? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85691?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ide4d92211fa7ab496c38ce1c4e895337c269d247 Gerrit-Change-Number: 85691 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 08:57:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com>

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[M] Change in coreboot[main]: mb/starlabs/*: Configure GPIO UPDs for eSPI
by Sean Rhodes (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Sean Rhodes. Hello Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85691?usp=email to look at the new patch set (#7). Change subject: mb/starlabs/*: Configure GPIO UPDs for eSPI ...................................................................... mb/starlabs/*: Configure GPIO UPDs for eSPI FSP defaults to using pins that are used for LPC; given that coreboot and these boards only supports eSPI, set these pins accordingly. If this is not done, FSP will assert and not boot. Change-Id: Ide4d92211fa7ab496c38ce1c4e895337c269d247 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/mainboard/starlabs/byte_adl/variants/mk_ii/Makefile.mk A src/mainboard/starlabs/byte_adl/variants/mk_ii/ramstage.c M src/mainboard/starlabs/starbook/variants/adl/ramstage.c M src/mainboard/starlabs/starbook/variants/rpl/ramstage.c M src/mainboard/starlabs/starfighter/variants/rpl/ramstage.c M src/mainboard/starlabs/starlite_adl/variants/mk_v/Makefile.mk A src/mainboard/starlabs/starlite_adl/variants/mk_v/ramstage.c 7 files changed, 53 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/85691/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/85691?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ide4d92211fa7ab496c38ce1c4e895337c269d247 Gerrit-Change-Number: 85691 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems>

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[S] Change in coreboot[main]: mb/starlabs/*: Set all I2C speeds to fast
by Sean Rhodes (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Paul Menzel. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84736?usp=email ) Change subject: mb/starlabs/*: Set all I2C speeds to fast ...................................................................... Patch Set 7: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84736/comment/1cd99536_4e3c89a9?us… : PS6, Line 9: driver > which driver? Linux? Done https://review.coreboot.org/c/coreboot/+/84736/comment/fe1ab798_7c117765?us… : PS6, Line 13: negligable > spelling Done https://review.coreboot.org/c/coreboot/+/84736/comment/3d51afb4_7a25711e?us… : PS6, Line 14: option to configure it. > "unused option" ? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84736?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic722e971e6f94965d28fd158a46d144a19490199 Gerrit-Change-Number: 84736 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 07 Jan 2025 08:57:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com>

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[S] Change in coreboot[main]: mb/starlabs/*: Set all I2C speeds to fast
by Sean Rhodes (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Paul Menzel, Sean Rhodes. Hello Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84736?usp=email to look at the new patch set (#7). Change subject: mb/starlabs/*: Set all I2C speeds to fast ...................................................................... mb/starlabs/*: Set all I2C speeds to fast The default i2c speed is I2C_SPEED_STANDARD, but the coreboot driver defaults to I2C_SPEED_FAST. The difference in performance and power consumption is negligible, so set the buses to fast and remove the superfluous option. Change-Id: Ic722e971e6f94965d28fd158a46d144a19490199 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/mainboard/starlabs/starbook/variants/adl/devicetree.cb M src/mainboard/starlabs/starbook/variants/cml/devicetree.cb M src/mainboard/starlabs/starbook/variants/kbl/devicetree.cb M src/mainboard/starlabs/starbook/variants/rpl/devicetree.cb M src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb M src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb M src/mainboard/starlabs/starlite_adl/variants/mk_v/devtree.c 7 files changed, 39 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/84736/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/84736?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic722e971e6f94965d28fd158a46d144a19490199 Gerrit-Change-Number: 84736 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>

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coreboot-gerrit January 2025