coreboot-gerrit January 2025

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Fix MT6363 buck5 enablement
by Yidi Lin (Code Review) 07 Jan '25

07 Jan '25

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85838?usp=email ) Change subject: soc/mediatek/mt8196: Fix MT6363 buck5 enablement ...................................................................... soc/mediatek/mt8196: Fix MT6363 buck5 enablement The MT6363 buck5 API's mask and shift settings are incorrect, preventing the buck from being disabled. Resolve the issue by correcting these two values. BUG=b:365445188 TEST=build pass, check buck5 is power off after calling the mt6363_enable_buck5 API. Change-Id: I0af1e0582ae8fc1e219f3cce536aed9985108be5 Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85838 Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yidi Lin <yidilin(a)google.com> --- M src/soc/mediatek/common/mt6363.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved Yidi Lin: Looks good to me, approved diff --git a/src/soc/mediatek/common/mt6363.c b/src/soc/mediatek/common/mt6363.c index 691282b..20ef9f0 100644 --- a/src/soc/mediatek/common/mt6363.c +++ b/src/soc/mediatek/common/mt6363.c @@ -211,7 +211,7 @@ void mt6363_enable_buck5(bool enable) { - mt6363_write_field(PMIC_VBUCK5_OP_EN_2, enable, 0x7, 0); + mt6363_write_field(PMIC_VBUCK5_OP_EN_2, enable, 0x1, 7); } void mt6363_enable_vcn15(bool enable) -- To view, visit https://review.coreboot.org/c/coreboot/+/85838?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0af1e0582ae8fc1e219f3cce536aed9985108be5 Gerrit-Change-Number: 85838 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Delay 0.5ms after enabling PMIF SPMI SW interface
by Yidi Lin (Code Review) 07 Jan '25

07 Jan '25

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85799?usp=email ) Change subject: soc/mediatek/mt8196: Delay 0.5ms after enabling PMIF SPMI SW interface ...................................................................... soc/mediatek/mt8196: Delay 0.5ms after enabling PMIF SPMI SW interface The initialization process of SPMI requires a certain amount of time (0.5ms) to ensure all components are correctly configured and synchronized. Otherwise, if the SPMI calibration fails, it will result in the non-serial firmware failing to boot. TEST=Build pass, non-serial firmware boot ok. BUG=b:341054056 Change-Id: I63df384061e4ed2629238f1843decd18d1ad1ac4 Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85799 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Reviewed-by: Yidi Lin <yidilin(a)google.com> --- M src/soc/mediatek/mt8196/pmif_spmi.c 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: Yu-Ping Wu: Looks good to me, approved Yidi Lin: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/mediatek/mt8196/pmif_spmi.c b/src/soc/mediatek/mt8196/pmif_spmi.c index d00afe1..e646816 100644 --- a/src/soc/mediatek/mt8196/pmif_spmi.c +++ b/src/soc/mediatek/mt8196/pmif_spmi.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only OR MIT */ #include <console/console.h> +#include <delay.h> #include <device/mmio.h> #include <gpio.h> #include <soc/addressmap.h> @@ -285,6 +286,7 @@ { write32(&arb->mtk_pmif->inf_en, PMIF_SPMI_SW_CHAN); write32(&arb->mtk_pmif->arb_en, PMIF_SPMI_SW_CHAN); + udelay(500); printk(BIOS_INFO, "%s done\n", __func__); } -- To view, visit https://review.coreboot.org/c/coreboot/+/85799?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I63df384061e4ed2629238f1843decd18d1ad1ac4 Gerrit-Change-Number: 85799 Gerrit-PatchSet: 6 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: soc/mediatek/common: Get storage type from mainboard
by Yidi Lin (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/85878?usp=email ) Change subject: soc/mediatek/common: Get storage type from mainboard ...................................................................... Patch Set 3: (1 comment) File src/soc/mediatek/common/include/soc/storage.h: https://review.coreboot.org/c/coreboot/+/85878/comment/42fcba7f_79753672?us… : PS2, Line 11: 0x0 > Just noticed that `_BASE_TYPE(x)` would return UFS for `STORAGE_UNKNOWN`. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85878?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5dba2b54b29a701b825fb9bfcac74eb45a563d71 Gerrit-Change-Number: 85878 Gerrit-PatchSet: 3 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 08 Jan 2025 02:51:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: soc/mediatek/common: Get storage type from mainboard
by Yidi Lin (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Yidi Lin. Hello Hung-Te Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85878?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/common: Get storage type from mainboard ...................................................................... soc/mediatek/common: Get storage type from mainboard Add common definitions and `mainboard_get_storage_type` API for determining the storage type from mainboard. TEST=emerge-rauru coreboot Change-Id: I5dba2b54b29a701b825fb9bfcac74eb45a563d71 Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- A src/soc/mediatek/common/include/soc/storage.h 1 file changed, 24 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/85878/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/85878?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5dba2b54b29a701b825fb9bfcac74eb45a563d71 Gerrit-Change-Number: 85878 Gerrit-PatchSet: 3 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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[S] Change in coreboot[main]: drivers/uart: Replace 'unsigned long int' by 'unsigned long'
by Elyes Haouas (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Ariel Otilibili. Elyes Haouas has posted comments on this change by Ariel Otilibili. ( https://review.coreboot.org/c/coreboot/+/85784?usp=email ) Change subject: drivers/uart: Replace 'unsigned long int' by 'unsigned long' ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85784?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1416a2f7d75a888dcaf0775894aced981800866f Gerrit-Change-Number: 85784 Gerrit-PatchSet: 1 Gerrit-Owner: Ariel Otilibili Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ariel Otilibili Gerrit-Comment-Date: Wed, 08 Jan 2025 02:49:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: intel/fsp1_1: Replace 'unsigned long int' by 'unsigned long'
by Elyes Haouas (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Ariel Otilibili. Elyes Haouas has posted comments on this change by Ariel Otilibili. ( https://review.coreboot.org/c/coreboot/+/85783?usp=email ) Change subject: intel/fsp1_1: Replace 'unsigned long int' by 'unsigned long' ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85783?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I940528dc4f8cb9b2d441d0f0d181cccebd315255 Gerrit-Change-Number: 85783 Gerrit-PatchSet: 1 Gerrit-Owner: Ariel Otilibili Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ariel Otilibili Gerrit-Comment-Date: Wed, 08 Jan 2025 02:49:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: arch/x86: Replace 'unsigned long int' by 'unsigned long'
by Elyes Haouas (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Ariel Otilibili, Felix Singer, Nicholas Chin. Elyes Haouas has posted comments on this change by Ariel Otilibili. ( https://review.coreboot.org/c/coreboot/+/85782?usp=email ) Change subject: arch/x86: Replace 'unsigned long int' by 'unsigned long' ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85782?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ida1de23830b0b67ab7fac635b02a4e99c65746f8 Gerrit-Change-Number: 85782 Gerrit-PatchSet: 2 Gerrit-Owner: Ariel Otilibili Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Ariel Otilibili Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Wed, 08 Jan 2025 02:48:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: Documentation: Fix invalid Wikipedia link
by Elyes Haouas (Code Review) 07 Jan '25

07 Jan '25

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85868?usp=email ) Change subject: Documentation: Fix invalid Wikipedia link ...................................................................... Documentation: Fix invalid Wikipedia link Previous redirect to the Wikipedia page for GPIO led to nowhere. Change-Id: I22dc606623dbc32af463e4501f1f21c119453792 Signed-off-by: libreandre <openrc(a)posteo.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85868 Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M Documentation/acronyms.md 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Elyes Haouas: Looks good to me, approved diff --git a/Documentation/acronyms.md b/Documentation/acronyms.md index 1bdfe87..199a7da 100644 --- a/Documentation/acronyms.md +++ b/Documentation/acronyms.md @@ -409,7 +409,7 @@ * GPD - PCH GPIO in Deep Sleep well (D5 power) * GPE - ACPI: General Purpose Event * GPI - GPIOs: GPIO Input -* GPIO - [**General Purpose Input/Output**](https://en.wikipedia.org/wiki/General-purpose_Input/Output) (Pin) +* GPIO - [**General Purpose Input/Output**](https://en.wikipedia.org/wiki/General-purpose_input/output) (Pin) * GPMR - Intel: General Purpose Memory Range * GPO - GPIOs: GPIO Output * GPP - AMD: General Purpose (PCI/PCIe) port -- To view, visit https://review.coreboot.org/c/coreboot/+/85868?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I22dc606623dbc32af463e4501f1f21c119453792 Gerrit-Change-Number: 85868 Gerrit-PatchSet: 3 Gerrit-Owner: openrc(a)posteo.de Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[M] Change in coreboot[main]: tree: Use "true", "false" for *acoustic_noise_mitigation
by Elyes Haouas (Code Review) 07 Jan '25

07 Jan '25

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85880?usp=email ) Change subject: tree: Use "true", "false" for *acoustic_noise_mitigation ...................................................................... tree: Use "true", "false" for *acoustic_noise_mitigation acoustic_noise_mitigation & enable_acoustic_noise_mitigation are boolean, so use true false instead of 0, 1. Change-Id: Icb1d2743222ff5100527fc6413cc13226a087904 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85880 Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <ericllai(a)google.com> --- M src/mainboard/google/brya/variants/anahera/overridetree.cb M src/mainboard/google/brya/variants/anahera4es/overridetree.cb M src/mainboard/google/brya/variants/crota/overridetree.cb M src/mainboard/google/brya/variants/gimble/overridetree.cb M src/mainboard/google/brya/variants/gimble4es/overridetree.cb M src/mainboard/google/brya/variants/joxer/overridetree.cb M src/mainboard/google/brya/variants/kano/overridetree.cb M src/mainboard/google/brya/variants/marasov/overridetree.cb M src/mainboard/google/brya/variants/primus/overridetree.cb M src/mainboard/google/brya/variants/pujjo/overridetree.cb M src/mainboard/google/brya/variants/pujjoga/overridetree.cb M src/mainboard/google/brya/variants/pujjoga/overridetree_pujjogatwin.cb M src/mainboard/google/brya/variants/redrix/overridetree.cb M src/mainboard/google/brya/variants/redrix4es/overridetree.cb M src/mainboard/google/brya/variants/riven/overridetree.cb M src/mainboard/google/brya/variants/rull/overridetree.cb M src/mainboard/google/brya/variants/sundance/overridetree.cb M src/mainboard/google/brya/variants/taeko/overridetree.cb M src/mainboard/google/brya/variants/taeko4es/overridetree.cb M src/mainboard/google/brya/variants/taniks/overridetree.cb M src/mainboard/google/brya/variants/telith/overridetree.cb M src/mainboard/google/brya/variants/xol/overridetree.cb M src/mainboard/google/brya/variants/zydron/overridetree.cb M src/mainboard/google/rex/variants/screebo/overridetree.cb M src/mainboard/prodrive/atlas/devicetree.cb 25 files changed, 25 insertions(+), 25 deletions(-) Approvals: build bot (Jenkins): Verified Kapil Porwal: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb index 4cc2efc..95787ee 100644 --- a/src/mainboard/google/brya/variants/anahera/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb @@ -29,7 +29,7 @@ register "usb2_phy_sus_pg_disable" = "1" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb index 2e14c64..33daa99 100644 --- a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb @@ -24,7 +24,7 @@ chip soc/intel/alderlake register "sagv" = "SaGv_Enabled" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/crota/overridetree.cb b/src/mainboard/google/brya/variants/crota/overridetree.cb index 1facf07..7b0fd59 100644 --- a/src/mainboard/google/brya/variants/crota/overridetree.cb +++ b/src/mainboard/google/brya/variants/crota/overridetree.cb @@ -48,7 +48,7 @@ }" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_4" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_4" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/gimble/overridetree.cb b/src/mainboard/google/brya/variants/gimble/overridetree.cb index ce705f7..3148996 100644 --- a/src/mainboard/google/brya/variants/gimble/overridetree.cb +++ b/src/mainboard/google/brya/variants/gimble/overridetree.cb @@ -25,7 +25,7 @@ register "platform_pmax" = "143" register "tcss_aux_ori" = "1" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/gimble4es/overridetree.cb b/src/mainboard/google/brya/variants/gimble4es/overridetree.cb index a81425b..802e11e 100644 --- a/src/mainboard/google/brya/variants/gimble4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/gimble4es/overridetree.cb @@ -25,7 +25,7 @@ register "platform_pmax" = "143" register "tcss_aux_ori" = "1" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/joxer/overridetree.cb b/src/mainboard/google/brya/variants/joxer/overridetree.cb index c12d412..c7849d2 100644 --- a/src/mainboard/google/brya/variants/joxer/overridetree.cb +++ b/src/mainboard/google/brya/variants/joxer/overridetree.cb @@ -17,7 +17,7 @@ register "sagv" = "SaGv_Enabled" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/kano/overridetree.cb b/src/mainboard/google/brya/variants/kano/overridetree.cb index 7620dde..6e3383e 100644 --- a/src/mainboard/google/brya/variants/kano/overridetree.cb +++ b/src/mainboard/google/brya/variants/kano/overridetree.cb @@ -36,7 +36,7 @@ register "pmc_gpe0_dw1" = "GPP_D" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/marasov/overridetree.cb b/src/mainboard/google/brya/variants/marasov/overridetree.cb index 57f0c90..add5181 100644 --- a/src/mainboard/google/brya/variants/marasov/overridetree.cb +++ b/src/mainboard/google/brya/variants/marasov/overridetree.cb @@ -29,7 +29,7 @@ chip soc/intel/alderlake # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/primus/overridetree.cb b/src/mainboard/google/brya/variants/primus/overridetree.cb index c7a1882..893b3cf 100644 --- a/src/mainboard/google/brya/variants/primus/overridetree.cb +++ b/src/mainboard/google/brya/variants/primus/overridetree.cb @@ -31,7 +31,7 @@ register "usb2_phy_sus_pg_disable" = "1" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/pujjo/overridetree.cb b/src/mainboard/google/brya/variants/pujjo/overridetree.cb index 082d3dd..60b35d7 100644 --- a/src/mainboard/google/brya/variants/pujjo/overridetree.cb +++ b/src/mainboard/google/brya/variants/pujjo/overridetree.cb @@ -55,7 +55,7 @@ chip soc/intel/alderlake # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/pujjoga/overridetree.cb b/src/mainboard/google/brya/variants/pujjoga/overridetree.cb index 8877c41..e1ac962 100644 --- a/src/mainboard/google/brya/variants/pujjoga/overridetree.cb +++ b/src/mainboard/google/brya/variants/pujjoga/overridetree.cb @@ -12,7 +12,7 @@ chip soc/intel/alderlake # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/pujjoga/overridetree_pujjogatwin.cb b/src/mainboard/google/brya/variants/pujjoga/overridetree_pujjogatwin.cb index a10ae5f..ba70a31 100644 --- a/src/mainboard/google/brya/variants/pujjoga/overridetree_pujjogatwin.cb +++ b/src/mainboard/google/brya/variants/pujjoga/overridetree_pujjogatwin.cb @@ -12,7 +12,7 @@ chip soc/intel/alderlake # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb index 6a35fc6..f26d133 100644 --- a/src/mainboard/google/brya/variants/redrix/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb @@ -42,7 +42,7 @@ register "fivr_spread_spectrum" = "FIVR_SS_6" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb index 3a1ae76..0157442 100644 --- a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb @@ -37,7 +37,7 @@ register "fivr_spread_spectrum" = "FIVR_SS_6" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/riven/overridetree.cb b/src/mainboard/google/brya/variants/riven/overridetree.cb index 6f8db3c..359c427 100644 --- a/src/mainboard/google/brya/variants/riven/overridetree.cb +++ b/src/mainboard/google/brya/variants/riven/overridetree.cb @@ -25,7 +25,7 @@ chip soc/intel/alderlake # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_4" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_4" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/rull/overridetree.cb b/src/mainboard/google/brya/variants/rull/overridetree.cb index 3c04da5..77c85b2 100644 --- a/src/mainboard/google/brya/variants/rull/overridetree.cb +++ b/src/mainboard/google/brya/variants/rull/overridetree.cb @@ -13,7 +13,7 @@ chip soc/intel/alderlake # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "true" diff --git a/src/mainboard/google/brya/variants/sundance/overridetree.cb b/src/mainboard/google/brya/variants/sundance/overridetree.cb index 03450d4..8782f5d 100644 --- a/src/mainboard/google/brya/variants/sundance/overridetree.cb +++ b/src/mainboard/google/brya/variants/sundance/overridetree.cb @@ -10,7 +10,7 @@ chip soc/intel/alderlake # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index 13d8836..964d833 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -53,7 +53,7 @@ register "usb2_phy_sus_pg_disable" = "1" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb index bbaa0ca..2dc3287 100644 --- a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb @@ -40,7 +40,7 @@ end chip soc/intel/alderlake # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/taniks/overridetree.cb b/src/mainboard/google/brya/variants/taniks/overridetree.cb index 807f40a..ebe5853 100644 --- a/src/mainboard/google/brya/variants/taniks/overridetree.cb +++ b/src/mainboard/google/brya/variants/taniks/overridetree.cb @@ -41,7 +41,7 @@ register "usb2_phy_sus_pg_disable" = "1" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/telith/overridetree.cb b/src/mainboard/google/brya/variants/telith/overridetree.cb index cac770f..8784e2f 100644 --- a/src/mainboard/google/brya/variants/telith/overridetree.cb +++ b/src/mainboard/google/brya/variants/telith/overridetree.cb @@ -21,7 +21,7 @@ register "sagv" = "SaGv_Enabled" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/xol/overridetree.cb b/src/mainboard/google/brya/variants/xol/overridetree.cb index 71e89de..69209fa 100644 --- a/src/mainboard/google/brya/variants/xol/overridetree.cb +++ b/src/mainboard/google/brya/variants/xol/overridetree.cb @@ -15,7 +15,7 @@ }" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_4" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_4" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/brya/variants/zydron/overridetree.cb b/src/mainboard/google/brya/variants/zydron/overridetree.cb index b02cb07..0acf490 100644 --- a/src/mainboard/google/brya/variants/zydron/overridetree.cb +++ b/src/mainboard/google/brya/variants/zydron/overridetree.cb @@ -36,7 +36,7 @@ register "pmc_gpe0_dw1" = "GPP_D" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" diff --git a/src/mainboard/google/rex/variants/screebo/overridetree.cb b/src/mainboard/google/rex/variants/screebo/overridetree.cb index e79cf8c..d46d7c9 100644 --- a/src/mainboard/google/rex/variants/screebo/overridetree.cb +++ b/src/mainboard/google/rex/variants/screebo/overridetree.cb @@ -97,7 +97,7 @@ # slew rate for IA Domain: Fast/8 # slew rate for GT Domain: Fast/8 # Ignore slew rate configuration for SA Domain - register "enable_acoustic_noise_mitigation" = "1" + register "enable_acoustic_noise_mitigation" = "true" register "disable_fast_pkgc_ramp[VR_DOMAIN_IA]" = "1" register "slow_slew_rate_config[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "disable_fast_pkgc_ramp[VR_DOMAIN_GT]" = "1" diff --git a/src/mainboard/prodrive/atlas/devicetree.cb b/src/mainboard/prodrive/atlas/devicetree.cb index baca59d..9afdda5 100644 --- a/src/mainboard/prodrive/atlas/devicetree.cb +++ b/src/mainboard/prodrive/atlas/devicetree.cb @@ -31,7 +31,7 @@ }" # Acoustic settings - register "acoustic_noise_mitigation" = "1" + register "acoustic_noise_mitigation" = "true" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_4" register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_4" register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/85880?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icb1d2743222ff5100527fc6413cc13226a087904 Gerrit-Change-Number: 85880 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: soc/mediatek/common: Get storage type from mainboard
by Yu-Ping Wu (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/85878?usp=email ) Change subject: soc/mediatek/common: Get storage type from mainboard ...................................................................... Patch Set 2: (1 comment) File src/soc/mediatek/common/include/soc/storage.h: https://review.coreboot.org/c/coreboot/+/85878/comment/39f759aa_108f0e6f?us… : PS2, Line 11: 0x0 Just noticed that `_BASE_TYPE(x)` would return UFS for `STORAGE_UNKNOWN`. Let's change this to 0x1, and change NVME to 0x2. -- To view, visit https://review.coreboot.org/c/coreboot/+/85878?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5dba2b54b29a701b825fb9bfcac74eb45a563d71 Gerrit-Change-Number: 85878 Gerrit-PatchSet: 2 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Wed, 08 Jan 2025 02:29:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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