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Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#6).
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Verified+1 by build bot (Jenkins)
Change subject: soc/mediatek/mt8196: Add modem power driver to disable unused power
......................................................................
soc/mediatek/mt8196: Add modem power driver to disable unused power
Disable MT6363 unused power:
vbuck5, vcn15, vrf09, vrf12, vrf13, vrf18, vsram_digrf, vsram_mdfe.
Disable MT6373 unused power:
vant18, vsim1, vsim2.
BUG=b:315894234
TEST=Build pass, Check there are no check failed logs. And check logs:
Vmodem value: 0x78 (means SPMI_SLAVE_4_750MV)
Signed-off-by: Xavier Chang <xavier.chang(a)mediatek.corp-partner.google.com>
Change-Id: Ia8808e3500727753e4537017b46ac8ab39d59468
---
M src/soc/mediatek/mt8196/Makefile.mk
A src/soc/mediatek/mt8196/include/soc/modem_power_ctrl.h
A src/soc/mediatek/mt8196/modem_power_ctrl.c
3 files changed, 112 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/85651/6
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Change subject: soc/intel/pantherlake: Add core scaling factors read support
......................................................................
Patch Set 11:
(1 comment)
Patchset:
PS11:
> Initially, I shared similar concerns when assigned this task. However, after consulting with internal experts, I gained insights into the rationale behind the proposed dynamic approach. Recent experiences have revealed a disconnect between IA firmware, operating system, and other SoC firmware, resulting in certain issues.
So you're saying that after booting to the OS, the kernel can't override the static boot config scaling ratio parameters? And that it's always relied on BIOS-programmed static values? That's a problem. We don't expect the BIOS to be as intelligent or capable as the kernel, to dynamically handle things. The BIOS should just be there to allow the OS to launch, and the OS should be able to handle most trivial tasks. It sounds like there's a gap between who designed the architecture and whoever is heavily relying on the BIOS to be the only source of truth here.
Recognizing the minimal boot time impact of approximately 12 microseconds associated with reading these values, I concluded that this approach was prudent to mitigate long-term concerns. This recommendation extends to future generations as well.
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Change subject: mb/google/fatcat: Enable SAGv
......................................................................
Patch Set 2:
This change is ready for review.
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Change subject: mb/google/nissa/var/telith: Reduce power limits according to battery status
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Patch Set 3: Code-Review+2
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Change subject: mb/google/nissa/var/telith: Reduce power limits according to battery status
......................................................................
Patch Set 3:
(3 comments)
File src/mainboard/google/brya/variants/baseboard/nissa/ramstage.c:
https://review.coreboot.org/c/coreboot/+/85894/comment/16565332_64a2f5c5?us… :
PS2, Line 11: #include <intelblocks/power_limit.h>
> please add one space after this line
Done
File src/mainboard/google/brya/variants/telith/ramstage.c:
https://review.coreboot.org/c/coreboot/+/85894/comment/c0fc5244_03337100?us… :
PS2, Line 49:
> no space required
Done
https://review.coreboot.org/c/coreboot/+/85894/comment/caf5bcf1_1570000f?us… :
PS2, Line 57:
> so many empty line
Done
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