coreboot-gerrit January 2025

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[M] Change in coreboot[main]: drivers/intel/fsp2_0: Add option to control debug log level using CBFS
by Jérémy Compostella (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Andrey Petrov, Intel coreboot Reviewers, Julius Werner, Ronak Kanabar, Subrata Banik. Jérémy Compostella has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86001?usp=email ) Change subject: drivers/intel/fsp2_0: Add option to control debug log level using CBFS ...................................................................... Patch Set 5: (3 comments) File src/drivers/intel/fsp2_0/Kconfig: https://review.coreboot.org/c/coreboot/+/86001/comment/bdc4f5a9_f351246a?us… : PS5, Line 528: default n unnecessary default, n is default for boolean. https://review.coreboot.org/c/coreboot/+/86001/comment/c9969f48_dddfcc1e?us… : PS5, Line 537: Here is the example of adding RAW binary file into the RO-CBFS to specify the Here is **an** example File src/drivers/intel/fsp2_0/include/fsp/debug.h: https://review.coreboot.org/c/coreboot/+/86001/comment/941b80ee_bb1f07d8?us… : PS5, Line 69: If `fsp_pcd_debug_level` not present If `fsp_pcd_debug_level` file is not present -- To view, visit https://review.coreboot.org/c/coreboot/+/86001?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2c14d26021dd0048fa24024119df857e216f18bd Gerrit-Change-Number: 86001 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Jan 2025 16:45:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: drivers/option: Add CBFS file based option backend
by Jérémy Compostella (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Julius Werner, Nicholas Chin, Subrata Banik. Jérémy Compostella has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/85905?usp=email ) Change subject: drivers/option: Add CBFS file based option backend ...................................................................... Patch Set 9: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85905/comment/05a46333_139c3189?us… : PS9, Line 11: prefix. Options should be stored in cbfs with the option/ prefix. Values As to my knowledge CBFS is acronym standing for CoreBoot File System CBFS, I would suggest to spell it uppercase. File src/drivers/option/cbfs_file_option.c: https://review.coreboot.org/c/coreboot/+/85905/comment/d991c1bb_e13b8ed0?us… : PS9, Line 7: unsigned int do_get_uint_option(const char *name, const unsigned int fallback) Why do we store a uint64_t to retrieve to get an unsigned int (uint32_t)? File src/include/option.h: https://review.coreboot.org/c/coreboot/+/85905/comment/34836d2e_f1bb9545?us… : PS9, Line 16: return fallback; Shouldn't an error be printed ? A call to get_uint_option() in SMM should be considered an issue as this is not supported. -- To view, visit https://review.coreboot.org/c/coreboot/+/85905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifc0439ee42f13f49ae54d4855d1d9333c39b01f5 Gerrit-Change-Number: 85905 Gerrit-PatchSet: 9 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Jan 2025 16:43:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XL] Change in coreboot[main]: mb/starlabs/starbook: Add Meteor Lake (165H) variant
by Matt DeVillier (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/85715?usp=email ) Change subject: mb/starlabs/starbook: Add Meteor Lake (165H) variant ...................................................................... Patch Set 21: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85715?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6621585086c58d19574841314796ed9db779036e Gerrit-Change-Number: 85715 Gerrit-PatchSet: 21 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Wed, 15 Jan 2025 16:21:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add RTC driver
by Yu-Ping Wu (Code Review) 15 Jan '25

15 Jan '25

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add RTC driver
by Yu-Ping Wu (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85978?usp=email ) Change subject: soc/mediatek/mt8196: Add RTC driver ...................................................................... Patch Set 1: (33 comments) File src/soc/mediatek/mt8196/include/soc/mt6685_hw.h: PS1: Is this file mt8196-specific? I wonder if this could be shared for all SoCs. File src/soc/mediatek/mt8196/include/soc/mt6685_rtc_hw.h: PS1: Is this file mt8196-specific? I wonder if this could be shared for all SoCs. One problem with this file is that, here contains many duplicate macros that are also defined in rtc_reg_common.h. File src/soc/mediatek/mt8196/include/soc/rtc.h: https://review.coreboot.org/c/coreboot/+/85978/comment/3ee672e6_07c41070?us… : PS1, Line 18: RTC_BBPU_PWREN = BIT(0), Many constants are duplicate in mt6685_rtc_hw.h. Could you explain the differences of these files: - rtc.h - mt6685_hw.h - mt6685_rtc_hw.h - mt6685_rtc.h Which one is SoC-specific? File src/soc/mediatek/mt8196/mt6685_rtc.c: https://review.coreboot.org/c/coreboot/+/85978/comment/1df04c76_728bc829?us… : PS1, Line 21: u16 u8 https://review.coreboot.org/c/coreboot/+/85978/comment/edb43241_1b6be658?us… : PS1, Line 21: config_interface_read Does it make more sense to rename it to `config_interface_read_byte` or `rtc_read_byte`? https://review.coreboot.org/c/coreboot/+/85978/comment/013d362f_d5e88e50?us… : PS1, Line 23: 0xff upper case https://review.coreboot.org/c/coreboot/+/85978/comment/09ee787f_1d7add2d?us… : PS1, Line 68: RG_BANK_FQMTR_RST_SHIFT); align Same for other similar calls. https://review.coreboot.org/c/coreboot/+/85978/comment/e60e3e39_eb0b6e5e?us… : PS1, Line 86: single space https://review.coreboot.org/c/coreboot/+/85978/comment/9d941eba_3fdb842e?us… : PS1, Line 101: !((rtc_read Align with `FQMTR_TIMEOUT_US` https://review.coreboot.org/c/coreboot/+/85978/comment/9078186d_69cafb45?us… : PS1, Line 106: 794 26M / 32K = 26 * 1024 / 32 = 832. How did you get the number 794? https://review.coreboot.org/c/coreboot/+/85978/comment/a94742d9_b2a90f81?us… : PS1, Line 106: k K https://review.coreboot.org/c/coreboot/+/85978/comment/874b3646_ff39d29d?us… : PS1, Line 107: rtc_read(RG_FQMTR_DATA, &rdata); : ret = rdata; Remove `ret`, add `u16 fqmtr_data`, write `rtc_read(..., &fqmtr_data)` here, and return `fqmtr_data` at the end of function. https://review.coreboot.org/c/coreboot/+/85978/comment/4c77f4e8_f8e32f5f?us… : PS1, Line 119: rdata fqmtr_data https://review.coreboot.org/c/coreboot/+/85978/comment/bfd60a3d_6c595655?us… : PS1, Line 129: four There are only 3: freq[0], freq[1], freq[2]. https://review.coreboot.org/c/coreboot/+/85978/comment/7a2e8f12_850d74da?us… : PS1, Line 139: remove blank line https://review.coreboot.org/c/coreboot/+/85978/comment/e8f0f579_a51a30ac?us… : PS1, Line 148: freq[2] > What is the difference from freq[0] ? Does the `config_interface` call in line #144 affect the result here? https://review.coreboot.org/c/coreboot/+/85978/comment/1a739d1e_f263d083?us… : PS1, Line 157: (rtc_measure_four_clock(&result), rtc_eosc_check_clock(&result)))) { align https://review.coreboot.org/c/coreboot/+/85978/comment/fd4b60fe_00a86f0b?us… : PS1, Line 191: ~(RTC_CON_LPSTA_RAW | RTC_CON_LPRST | align https://review.coreboot.org/c/coreboot/+/85978/comment/ac2f4263_2865f426?us… : PS1, Line 207: (RTC_BBPU_RESET_SPAR & (~RTC_BBPU_SPAR_SW))); align https://review.coreboot.org/c/coreboot/+/85978/comment/21ba362c_d7060a46?us… : PS1, Line 221: printk(BIOS_INFO, "%s time out!\n", __func__); > Is this an error? This should be. https://review.coreboot.org/c/coreboot/+/85978/comment/54f85c28_54c36d49?us… : PS1, Line 309: MT6685_SCK_TOP_CKPDN_CON0_L Use `SCK_TOP_CKPDN_CON0_L`, and remove <soc/mt6685_hw.h>. https://review.coreboot.org/c/coreboot/+/85978/comment/84568dc0_62044b90?us… : PS1, Line 376: INFO ERR https://review.coreboot.org/c/coreboot/+/85978/comment/ecccbad3_21d30509?us… : PS1, Line 376: 3 times retry https://review.coreboot.org/c/coreboot/+/85978/comment/2a7c865e_a521b13e?us… : PS1, Line 417: remove one blank line https://review.coreboot.org/c/coreboot/+/85978/comment/de4bbd0e_0cf6f482?us… : PS1, Line 426: after writing BBPU The point of this extra message is to differentiate between different error logs (such as the one in line #392 and this one). Please use different messages. For example this one could be `rtc_writeif_unlock failed after writing BBPU again`. https://review.coreboot.org/c/coreboot/+/85978/comment/b7bd1b81_93f35366?us… : PS1, Line 426: failed https://review.coreboot.org/c/coreboot/+/85978/comment/54a4185d_bf45299b?us… : PS1, Line 439: failed https://review.coreboot.org/c/coreboot/+/85978/comment/bbe2f06e_9f3c57f4?us… : PS1, Line 445: failed https://review.coreboot.org/c/coreboot/+/85978/comment/e3104934_83ec5d37?us… : PS1, Line 524: Check clock source are match with 32K exist `Check if clock sources match existing 32K` Is this comment for `rtc_measure_four_clock` or `rtc_eosc_check_clock`? `rtc_measure_four_clock` doesn't seem to check anything. https://review.coreboot.org/c/coreboot/+/85978/comment/ca2cd158_c5402190?us… : PS1, Line 535: (rtc_con & RTC_CON_LPSTA_RAW) ? : "with" : "without") Same line. https://review.coreboot.org/c/coreboot/+/85978/comment/2ea7a30e_7f31aab8?us… : PS1, Line 583: `to` Same for other similar comments below. https://review.coreboot.org/c/coreboot/+/85978/comment/aa049e24_79bdb756?us… : PS1, Line 595: Selects Select https://review.coreboot.org/c/coreboot/+/85978/comment/8453c4f2_aa1e724c?us… : PS1, Line 600: Truning You mean `Turn`? -- To view, visit https://review.coreboot.org/c/coreboot/+/85978?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3dd337eaa3eed3012ddea300f7e04f2b63fb2daa Gerrit-Change-Number: 85978 Gerrit-PatchSet: 1 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Wed, 15 Jan 2025 16:20:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[XS] Change in coreboot[main]: acpi: Guard CBMEM driver against Chrome devices
by Sean Rhodes (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Cliff Huang, Lance Zhao, Matt DeVillier, Tim Wawrzynczak. Hello Cliff Huang, Lance Zhao, Matt DeVillier, Tim Wawrzynczak, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81029?usp=email to look at the new patch set (#2). Change subject: acpi: Guard CBMEM driver against Chrome devices ...................................................................... acpi: Guard CBMEM driver against Chrome devices Commit ce10b6f82185baa2a777d946ca6c9ba72d3d6ef8 unhid the BOOT0000 device from Windows. It requires a driver that's available from Coolstars EC bundle. Guard this against the ChromeEC, so that non-Chromebooks don't get an error device in Device Manager. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I6645c1be7d602a2775f703f5cf56e4c9d6f3bb76 --- M src/acpi/acpi.c 1 file changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/81029/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81029?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6645c1be7d602a2775f703f5cf56e4c9d6f3bb76 Gerrit-Change-Number: 81029 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com>

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[XS] Change in coreboot[main]: acpi: Guard CBMEM driver against Chrome devices
by Sean Rhodes (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/81029?usp=email ) Change subject: acpi: Guard CBMEM driver against Chrome devices ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/81029?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6645c1be7d602a2775f703f5cf56e4c9d6f3bb76 Gerrit-Change-Number: 81029 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Jan 2025 16:17:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: CFR: add dependencies based on specific option values
by Filip Brozovic (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Angel Pons, Matt DeVillier. Filip Brozovic has posted comments on this change by Filip Brozovic. ( https://review.coreboot.org/c/coreboot/+/85987?usp=email ) Change subject: CFR: add dependencies based on specific option values ...................................................................... Patch Set 1: (1 comment) File src/drivers/option/cfr_frontend.h: https://review.coreboot.org/c/coreboot/+/85987/comment/b116516e_884cf181?us… : PS1, Line 116: .num_dep_values = sizeof((uint32_t[]) { __VA_ARGS__ }) / sizeof(uint32_t) > ARRAY_SIZE doesn't work here because ARRAY_SIZE({ \__VA_ARGS__ }) gets expanded to ARRAY_SIZE(arg1, […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85987?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaf7965551490969052eb27c207fa524470d4dd6a Gerrit-Change-Number: 85987 Gerrit-PatchSet: 1 Gerrit-Owner: Filip Brozovic <fbrozovic(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Jan 2025 16:15:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Filip Brozovic <fbrozovic(a)gmail.com>

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[XL] Change in coreboot[main]: mb/starlabs/starbook: Add Meteor Lake (165H) variant
by Sean Rhodes (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Matt DeVillier, Sean Rhodes. Hello Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85715?usp=email to look at the new patch set (#21). The following approvals got outdated and were removed: Code-Review+2 by Matt DeVillier, Verified+1 by build bot (Jenkins) The change is no longer submittable: Code-Review and Verified are unsatisfied now. Change subject: mb/starlabs/starbook: Add Meteor Lake (165H) variant ...................................................................... mb/starlabs/starbook: Add Meteor Lake (165H) variant Tested using `edk2` from `https://github.com/starlabsltd/edk2/tree/uefipayload_vs`: * Ubuntu 24.04 * Manjaro 24 No known issues. https://starlabs.systems/pages/starbook-specification Change-Id: I6621585086c58d19574841314796ed9db779036e Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M Documentation/mainboard/index.md A Documentation/mainboard/starlabs/starbook_mtl.md M src/mainboard/starlabs/starbook/Kconfig M src/mainboard/starlabs/starbook/Kconfig.name M src/mainboard/starlabs/starbook/dsdt.asl A src/mainboard/starlabs/starbook/variants/mtl/Makefile.mk A src/mainboard/starlabs/starbook/variants/mtl/board.fmd A src/mainboard/starlabs/starbook/variants/mtl/data.vbt A src/mainboard/starlabs/starbook/variants/mtl/devicetree.cb A src/mainboard/starlabs/starbook/variants/mtl/devtree.c A src/mainboard/starlabs/starbook/variants/mtl/gpio.c A src/mainboard/starlabs/starbook/variants/mtl/hda_verb.c A src/mainboard/starlabs/starbook/variants/mtl/ramstage.c A src/mainboard/starlabs/starbook/variants/mtl/romstage.c 14 files changed, 1,158 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/85715/21 -- To view, visit https://review.coreboot.org/c/coreboot/+/85715?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6621585086c58d19574841314796ed9db779036e Gerrit-Change-Number: 85715 Gerrit-PatchSet: 21 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com>

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[L] Change in coreboot[main]: mb/starlabs/starbook: Add Meteor Lake (165H) variant
by Matt DeVillier (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/85715?usp=email ) Change subject: mb/starlabs/starbook: Add Meteor Lake (165H) variant ...................................................................... Patch Set 20: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85715?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6621585086c58d19574841314796ed9db779036e Gerrit-Change-Number: 85715 Gerrit-PatchSet: 20 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Wed, 15 Jan 2025 16:12:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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coreboot-gerrit January 2025