coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: intelp2m/patform/cnl: Add unit tests
by Maximilian Brune (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Alicja Michalska, David Hendricks, Maxim Polyakov. Maximilian Brune has posted comments on this change by Maxim Polyakov. ( https://review.coreboot.org/c/coreboot/+/85548?usp=email ) Change subject: intelp2m/patform/cnl: Add unit tests ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85548?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icb0b6506a07b96903e6bc7994e5f97d483d0a330 Gerrit-Change-Number: 85548 Gerrit-PatchSet: 4 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Reviewer: Daniel Maslowski <info(a)orangecms.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Jan 2025 18:58:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: MAINTAINERS: Add Alicja Michalska to Erying and Topton mainboards
by Maximilian Brune (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Alicja Michalska. Maximilian Brune has posted comments on this change by Alicja Michalska. ( https://review.coreboot.org/c/coreboot/+/85977?usp=email ) Change subject: MAINTAINERS: Add Alicja Michalska to Erying and Topton mainboards ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85977?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2484fc488040c2d86bbf3bf98f39354bf88efae8 Gerrit-Change-Number: 85977 Gerrit-PatchSet: 2 Gerrit-Owner: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Jan 2025 18:48:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: commonlib/device_tree: Skip dt_read_cell_props() when not needed
by Maximilian Brune (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Julius Werner. Maximilian Brune has posted comments on this change by Julius Werner. ( https://review.coreboot.org/c/coreboot/+/85989?usp=email ) Change subject: commonlib/device_tree: Skip dt_read_cell_props() when not needed ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85989?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I114f824a7d88b0bac4a96aca3f7dced459503b02 Gerrit-Change-Number: 85989 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Doug Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Wed, 15 Jan 2025 18:39:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: commonlib/device_tree: Initialize cells to default values on find()
by Maximilian Brune (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Julius Werner. Maximilian Brune has posted comments on this change by Julius Werner. ( https://review.coreboot.org/c/coreboot/+/85988?usp=email ) Change subject: commonlib/device_tree: Initialize cells to default values on find() ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85988?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I39ba2c82d3a0d0b39a2ed5eba2420a04fbccb2f7 Gerrit-Change-Number: 85988 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Doug Anderson <dianders(a)chromium.org> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Wed, 15 Jan 2025 18:39:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: Revert "cpu/x86/topology: Simplify CPU topology initialization"
by Patrick Rudolph (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Christian Walter, Intel coreboot Reviewers, Johnny Lin, Jonathan Zhang, Sean Rhodes, Shuo Liu, Tim Chu. Patrick Rudolph has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86003?usp=email ) Change subject: Revert "cpu/x86/topology: Simplify CPU topology initialization" ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86003?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I026d1cd856503175683c44e9d2412dec54ebed48 Gerrit-Change-Number: 86003 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Wed, 15 Jan 2025 17:40:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: Revert "cpu/x86/topology: Simplify CPU topology initialization"
by Jérémy Compostella (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Christian Walter, Intel coreboot Reviewers, Johnny Lin, Jonathan Zhang, Patrick Rudolph, Sean Rhodes, Shuo Liu, Tim Chu. Jérémy Compostella has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86003?usp=email ) Change subject: Revert "cpu/x86/topology: Simplify CPU topology initialization" ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Could we debug this instead ? this is going to waterfall other issue if this is being reverted. -- To view, visit https://review.coreboot.org/c/coreboot/+/86003?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I026d1cd856503175683c44e9d2412dec54ebed48 Gerrit-Change-Number: 86003 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Wed, 15 Jan 2025 17:10:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/intel/ptl: Enable FSP debug log level control using CBFS
by Subrata Banik (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Intel coreboot Reviewers, Julius Werner, Jérémy Compostella, Kapil Porwal, Pranava Y N. Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86002?usp=email ) Change subject: soc/intel/ptl: Enable FSP debug log level control using CBFS ...................................................................... Patch Set 4: (2 comments) File src/soc/intel/pantherlake/Kconfig: https://review.coreboot.org/c/coreboot/+/86002/comment/0a9f4429_7db16ffd?us… : PS4, Line 19: select FSP_DEBUG_LOG_LEVEL_USING_CBFS if MAINBOARD_HAS_CHROMEOS > Why does it depend on MAINBOARD_HAS_CHROMEOS? There is a dependency that allows us to stitch debug FSP into AP FW image. However, not all PTL platforms stitch debug FSP into AP FW. Therefore, some special steps exist in our cros ebuild that allow us to handle the soc firmware log level dynamically. These steps may not be flexible for other platforms, and we shouldn't assume that every PTL design will bake debug FSP binary into their AP FW. File src/soc/intel/pantherlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/86002/comment/0d204df8_408147cc?us… : PS4, Line 314: if (CONFIG(FSP_DEBUG_LOG_LEVEL_USING_CBFS) && is_enabled) { > It looks quite a cumbersome construction to me, what adding and using the following helper function: > ``` > static enum fsp_log_level fsp_get_log_level(bool is_enabled) > { > if (!is_enabled) > return FSP_LOG_LEVEL_DISABLE; > > if (CONFIG(FSP_DEBUG_LOG_LEVEL_USING_CBFS)) > return get_fsp_mrc_debug_log_level(); > > return fsp_map_console_log_level(); > } > ``` There are two log levels for handling general FSP and MRC serial output, and each can be handled separately during boot. Therefore, we are calling into get_fsp_pcd_debug_log_level and get_fsp_mrc_debug_log_level before UPD assignment to get specific control knob assigned by the user. -- To view, visit https://review.coreboot.org/c/coreboot/+/86002?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia2fc07188afde34d61ce8d50d3d722de48228e37 Gerrit-Change-Number: 86002 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 15 Jan 2025 17:07:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com>

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[S] Change in coreboot[main]: soc/intel/ptl: Enable FSP debug log level control using CBFS
by Jérémy Compostella (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Intel coreboot Reviewers, Julius Werner, Kapil Porwal, Pranava Y N, Subrata Banik. Jérémy Compostella has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86002?usp=email ) Change subject: soc/intel/ptl: Enable FSP debug log level control using CBFS ...................................................................... Patch Set 4: (2 comments) File src/soc/intel/pantherlake/Kconfig: https://review.coreboot.org/c/coreboot/+/86002/comment/1f0a4fb8_0f046c0c?us… : PS4, Line 19: select FSP_DEBUG_LOG_LEVEL_USING_CBFS if MAINBOARD_HAS_CHROMEOS Why does it depend on MAINBOARD_HAS_CHROMEOS? File src/soc/intel/pantherlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/86002/comment/64f2be2c_7270be59?us… : PS4, Line 314: if (CONFIG(FSP_DEBUG_LOG_LEVEL_USING_CBFS) && is_enabled) { It looks quite a cumbersome construction to me, what adding and using the following helper function: ``` static enum fsp_log_level fsp_get_log_level(bool is_enabled) { if (!is_enabled) return FSP_LOG_LEVEL_DISABLE; if (CONFIG(FSP_DEBUG_LOG_LEVEL_USING_CBFS)) return get_fsp_mrc_debug_log_level(); return fsp_map_console_log_level(); } ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/86002?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia2fc07188afde34d61ce8d50d3d722de48228e37 Gerrit-Change-Number: 86002 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 15 Jan 2025 16:57:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: drivers/intel/fsp2_0: Add option to control debug log level using CBFS
by Jérémy Compostella (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Andrey Petrov, Intel coreboot Reviewers, Julius Werner, Ronak Kanabar, Subrata Banik. Jérémy Compostella has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86001?usp=email ) Change subject: drivers/intel/fsp2_0: Add option to control debug log level using CBFS ...................................................................... Patch Set 5: (1 comment) File src/drivers/intel/fsp2_0/debug.c: https://review.coreboot.org/c/coreboot/+/86001/comment/dfe98c57_55cf002b?us… : PS5, Line 183: enum fsp_log_level get_fsp_pcd_debug_log_level(void) All fsp helper function are prefixed with fsp, shouldn't we write it fsp_get_pcd_debug_log_level() ? -- To view, visit https://review.coreboot.org/c/coreboot/+/86001?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2c14d26021dd0048fa24024119df857e216f18bd Gerrit-Change-Number: 86001 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Jan 2025 16:57:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: acpi: Guard CBMEM driver against Chrome devices
by Matt DeVillier (Code Review) 15 Jan '25

15 Jan '25

Attention is currently required from: Cliff Huang, Lance Zhao, Sean Rhodes, Tim Wawrzynczak. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/81029?usp=email ) Change subject: acpi: Guard CBMEM driver against Chrome devices ...................................................................... Patch Set 3: Code-Review+2 (1 comment) Patchset: PS3: seems reasonable to me -- To view, visit https://review.coreboot.org/c/coreboot/+/81029?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6645c1be7d602a2775f703f5cf56e4c9d6f3bb76 Gerrit-Change-Number: 81029 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Comment-Date: Wed, 15 Jan 2025 16:56:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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coreboot-gerrit January 2025