Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84394?usp=email )
Change subject: mb/facebook/fbg1701: Correct number of jacks in hda_verb.c
......................................................................
mb/facebook/fbg1701: Correct number of jacks in hda_verb.c
This was found due to the `_Static_assert()` from CB:84360 failing.
Change-Id: I60bb9e7df368b786e17bb49a6f35d27372fd21de
Signed-off-by: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84394
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/mainboard/facebook/fbg1701/hda_verb.c
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
Felix Held: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/mainboard/facebook/fbg1701/hda_verb.c b/src/mainboard/facebook/fbg1701/hda_verb.c
index 2ace42d..eae4d03 100644
--- a/src/mainboard/facebook/fbg1701/hda_verb.c
+++ b/src/mainboard/facebook/fbg1701/hda_verb.c
@@ -6,7 +6,7 @@
/* coreboot specific header */
0x10EC0298, /* Codec Vendor - Device ID: Realtek ALC298 */
0x152D1165, /* Subsystem ID Quanta */
- 0x0000000C, /* Number of jacks */
+ 0x0000000E, /* Number of jacks */
/* HDA Codec Subsystem ID Verb Table */
AZALIA_SUBVENDOR(0, 0x152D1165),
--
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Change subject: mb/facebook/fbg1701: Correct number of jacks in hda_verb.c
......................................................................
Patch Set 1: Code-Review+2
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84396?usp=email )
Change subject: mb/msi/ms7e06: Correct number of jacks in hda_verb.c
......................................................................
mb/msi/ms7e06: Correct number of jacks in hda_verb.c
This was found due to the `_Static_assert()` from CB:84360 failing.
Change-Id: I5cf34d8c4e27835d126eb66f2015d2e9d93b700f
Signed-off-by: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84396
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
---
M src/mainboard/msi/ms7e06/hda_verb.c
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Michał Żygowski: Looks good to me, approved
diff --git a/src/mainboard/msi/ms7e06/hda_verb.c b/src/mainboard/msi/ms7e06/hda_verb.c
index 51f9a50..96578fa 100644
--- a/src/mainboard/msi/ms7e06/hda_verb.c
+++ b/src/mainboard/msi/ms7e06/hda_verb.c
@@ -26,7 +26,7 @@
/* Alderlake HDMI */
0x80862818, /* Vendor ID */
0x80860101, /* Subsystem ID */
- 2, /* Number of entries */
+ 10, /* Number of entries */
AZALIA_SUBVENDOR(2, 0x80860101),
AZALIA_PIN_CFG(2, 0x04, 0x18560010),
AZALIA_PIN_CFG(2, 0x06, 0x18560010),
--
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Change subject: mb/google/corsola: Distinguish MT8186T's SKU ID from MT8186
......................................................................
Patch Set 6:
(1 comment)
File src/mainboard/google/corsola/boardid.c:
https://review.coreboot.org/c/coreboot/+/84342/comment/ad873261_4e83c928?us… :
PS2, Line 132: BOARD_GOOGLE_STEELIX
> @wuyang5@huaqin.corp-partner.google.com quickly discussed with @knoxchiou@google. […]
Based on the suggestions in the issue, make MT8186T -> 0x7FFFFEFF.
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Hello Hung-Te Lin, Knox Chiou, Xinxiong Xu, Yidi Lin, Yu-Ping Wu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Verified+1 by build bot (Jenkins)
Change subject: mb/google/corsola: Distinguish MT8186T's SKU ID from MT8186
......................................................................
mb/google/corsola: Distinguish MT8186T's SKU ID from MT8186
For MT8186, factory pre-flashed 0x7fffffff as default SKUD ID and kernel
can load the corresponding dts file. To make MT8186T functional on
0x7fffffff devices, change the SKU ID to 0x7ffffeff, so that the correct
dts file will be selected by the payload.
BUG=b:365730137
TEST=1. Pre-flashed 0x7fffffff and boot OS.
2. Check OS boot normally by 0x7ffffeff.
BRANCH=corsola
Change-Id: I91306d3abd508e104851916882fb36a4fd302036
Signed-off-by: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com>
---
M src/mainboard/google/corsola/boardid.c
1 file changed, 24 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/84342/6
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Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/84356?usp=email )
Change subject: drivers/intel/fsp2_0: Simplify FSP global reset definition
......................................................................
Patch Set 8:
(2 comments)
File src/soc/intel/apollolake/Kconfig:
https://review.coreboot.org/c/coreboot/+/84356/comment/baaa2ac5_b8fb1e41?us… :
PS6, Line 400: default 5
> BTW, Subrata's first link is not accessible for everyone but I guess he is referring to something like this:
> https://github.com/coreboot/coreboot/blob/main/src/vendorcode/intel/edk2/ed…
Werner, you are right. I copied the internal link when I should have pasted the external EDK2 link to explain that what we did back in coreboot was relying on FSP 2.0 spec and was not wrong.
If Intel wants to support FSP2.4 with x64 implementation, they can add one more kconfig and define the 64-bit width Kconfig defaults in a similar manner. Inside the reset.c file, we can add a check depending on x64 or x32 support to know which reset type to check for. Adding a random index and using a wrapper might be suitable for EDK2 customers because they will use the same EDK2 code, but it may not be applicable for the coreboot community.
File src/soc/intel/common/fsp_reset.c:
https://review.coreboot.org/c/coreboot/+/84356/comment/33700255_f68a30fe?us… :
PS8, Line 9: #define FSP_STATUS_GLOBAL_RESET \
: (FSP_STATUS_RESET_REQUIRED_COLD + CONFIG_FSP_STATUS_GLOBAL_RESET_INDEX - 1)
> This is again very intel specific behavior. You could have extended to 64 bit by keeping the value untouched and extending it with 32 leading zero bits. Everything could just have worked by maybe just adjusting the data type.
+2 here.
> Instead the 64 bit extension was done in the upper bits while 32 additional, unused bits where added in the middle. Where is the benefit?
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Change subject: mb/google/corsola: Distinguish MT8186T's SKU ID from MT8186
......................................................................
mb/google/corsola: Distinguish MT8186T's SKU ID from MT8186
For MT8186, factory pre-flashed 0x7fffffff as default SKUD ID and kernel
can load the corresponding dts file. To make MT8186T functional on
0x7fffffff devices, change the SKU ID to 0x7ffffeff, so that the correct
dts file will be selected by the payload.
BUG=b:365730137
TEST=1. Pre-flashed 0x7fffffff and boot OS.
2. Check OS boot normally by 0x7ffffeff.
BRANCH=corsola
Change-Id: I91306d3abd508e104851916882fb36a4fd302036
Signed-off-by: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com>
---
M src/mainboard/google/corsola/boardid.c
1 file changed, 23 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/84342/5
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Change subject: drivers/intel/fsp2_0: Simplify FSP global reset definition
......................................................................
Patch Set 8:
(1 comment)
File src/soc/intel/apollolake/Kconfig:
https://review.coreboot.org/c/coreboot/+/84356/comment/bc6bb936_8fad4ae3?us… :
PS6, Line 400: default 5
> I guess what Subrata means here is that in the current implementation you will see FSP_STATUS_GLOBAL […]
BTW, Subrata's first link is not accessible for everyone but I guess he is referring to something like this:
https://github.com/coreboot/coreboot/blob/main/src/vendorcode/intel/edk2/ed…
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