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Change subject: soc/intel/common/block/pmc: Add GPE1 functions
......................................................................
Patch Set 11:
(1 comment)
File src/soc/intel/common/block/include/intelblocks/pmclib.h:
https://review.coreboot.org/c/coreboot/+/84104/comment/fc7d65cd_476be53f?us… :
PS11, Line 241: gpe0_mask
> > > Adding GPE1 ref from PTL EDS links for internal device events: […]
Subrata,
Your point of decoupling GPE1 from GPE0 makes sense. However, I am not quite followed your suggestion, can you help me a bit more here? In fact, this is the only place that particularly disable PME_B0 event and then all GPE bits are disabled. I am not sure what is the reason behind and why we cannot just simply disable all GPE events. Going back to the doubt that I have on extending this 'pmc_disable_std_gpe(PME_B0_EN);' so that it can cover GPE1 portion. No STS bits was read in order to disable PME_B0. I don't find a clean/generic way to come out with mask array to disable GPE1 events and combine with the existing 32-bit GPE0 mask here for this pmc_disable_std_gpe function as an array argument.
static void smm_southbridge_enable(uint16_t pm1_events)
{
uint32_t smi_params = ENABLE_SMI_PARAMS;
printk(BIOS_DEBUG, "Enabling SMIs.\n");
/* Configure events */
pmc_enable_pm1(pm1_events);
pmc_disable_std_gpe(PME_B0_EN); <-
...
pmc_disable_all_gpe();
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Change subject: tree: Use boolean for dptf_enable
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> I prefer true/false. It reduce ambiguity and potential errors and it prepare for modern C.
> (C23 uses true and false instead of 0 and 1)
I find it highly irritating to call something true/false that would be on/off or
enabled/disabled in natural language. 1/0 seems like the canonical equivalent,
we even put these on switches [1].
Does the compiler warn with C23 enabled?
[1] https://www.boatersland.com/images/img/jr-products-13735-mini-on-off-labele…
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Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84240?usp=email )
Change subject: Doc/rmodules.md: Move to lib
......................................................................
Doc/rmodules.md: Move to lib
The content of this page fits lib the best, which also reflects the
location of the rmodule runtime code in the src tree. This also fixes a
"document isn't included in any toctree" warning from Sphinx since it is
now added to the lib/index.md toctree.
Change-Id: I86545f4c1a7e1b3ccefa4f6085e764536f33f29c
Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84240
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Nico Huber <nico.h(a)gmx.de>
---
M Documentation/lib/index.md
R Documentation/lib/rmodules.md
2 files changed, 1 insertion(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Nico Huber: Looks good to me, approved
diff --git a/Documentation/lib/index.md b/Documentation/lib/index.md
index 612b883..f75408d 100644
--- a/Documentation/lib/index.md
+++ b/Documentation/lib/index.md
@@ -10,4 +10,5 @@
ABI data consumption <abi-data-consumption.md>
Timestamps <timestamp.md>
Firmware Configuration Interface <fw_config.md>
+Relocatable Modules <rmodules.md>
```
diff --git a/Documentation/rmodules.md b/Documentation/lib/rmodules.md
similarity index 100%
rename from Documentation/rmodules.md
rename to Documentation/lib/rmodules.md
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Change subject: Doc/rmodules.md: Change header levels
......................................................................
Doc/rmodules.md: Change header levels
Increase the header levels of headers following the initial "Relocatable
Modules (rmodules)" so that there is only one title for the page with
the other headings as subheadings. Also fix header capitalization while
we're here.
Change-Id: I72ae99ba10bf5b2386da2cc702efaf25328d6811
Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84239
Reviewed-by: Nico Huber <nico.h(a)gmx.de>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M Documentation/rmodules.md
1 file changed, 5 insertions(+), 5 deletions(-)
Approvals:
build bot (Jenkins): Verified
Nico Huber: Looks good to me, approved
diff --git a/Documentation/rmodules.md b/Documentation/rmodules.md
index 520d184..8a707b8 100644
--- a/Documentation/rmodules.md
+++ b/Documentation/rmodules.md
@@ -15,9 +15,9 @@
based on the location of the binary (which was returned by CBMEM
at runtime).
-# Implementation Details
+## Implementation Details
-## build time
+### Build Time
At build time the rmodtool (util/cbfstool/rmodtool.c) is used to
create relocatable modules. The rmodtool basically takes an ELF
@@ -44,7 +44,7 @@
2. program (.program)
3. relocation entries (.relocs)
-## runtime
+### Runtime
Either rmodule\_load (lib/rmodule.c) is used directly or through the
rmodule\_stage\_load (lib/rmodule.c) wrapper. It is used to load the
@@ -59,7 +59,7 @@
itself is just a simple addition, that adds an offset from where the
image was "supposed" to be at link time, to where it is now relocated.
-## module\_parameters
+### module\_parameters
module\_parameters is a section inside the rmodule ELF file. Its
basically a way to pass runtime information to an rmodule
@@ -73,7 +73,7 @@
struct smm_runtime smm_runtime;
```
-# x86 why rmodules
+## x86 why rmodules
//TODO
x86: postcar and ramstage cannot conflict with payload regarding
memory placement. Therefore payload location is usually fixed and
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Change subject: Doc/rmodules.md: Change header levels
......................................................................
Patch Set 4: Code-Review+2
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Change subject: Fix no-op for empty arg in Makefile conditional
......................................................................
Patch Set 6:
(2 comments)
Patchset:
PS4:
> Let's keep this comment unresolved. […]
It's allowed to be empty, though.
Overall, I think we can live with a little uncertainty about the
environment that triggers the issue. Just the commit message
should be updated, I'll comment there.
Commit Message:
https://review.coreboot.org/c/coreboot/+/83887/comment/50174f1a_fe2dc72f?us… :
PS6, Line 22: the Makefile from breaking under the specified conditions.
The `-c: option requires an argument` is nothing new and expected behavior.
The problem rather seems to be that make executes a shell with an empty line
(after processing the `$(if )`).
Please state instead that this change works around an issue in a particular
environment. (And please consider reporting the issue upstream for your
environment. Other projects may have similar makefile constructs, and they
won't have to investigate / work around this if it's fixed upstream.)
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Change subject: intel/alderlake: Sort FSP paths, most specific selectors first
......................................................................
intel/alderlake: Sort FSP paths, most specific selectors first
The `!FSP_USE_REPO` is most specific, if we're not using the FSP repo,
we can ignore all the FSP-repo paths. Hence put these first.
Having `FSP_TYPE_IOT` selected is also more specific, we can ignore all
the "Client" paths then. This makes sure that we don't catch a "Client"
by accident (otherwise we'd have to add a `!FSP_TYPE_IOT` for those).
Change-Id: Ibe9931d8f964a337c46fde31a3bc22c69d40eded
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83825
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
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Reviewed-by: Martin L Roth <gaumless(a)gmail.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar(a)intel.com>
---
M src/soc/intel/alderlake/Kconfig
1 file changed, 7 insertions(+), 7 deletions(-)
Approvals:
build bot (Jenkins): Verified
Martin L Roth: Looks good to me, approved
Ronak Kanabar: Looks good to me, but someone else must approve
Paul Menzel: Looks good to me, but someone else must approve
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 2c441fc..7e5376b 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -401,29 +401,29 @@
default "src/vendorcode/intel/fsp/fsp2_0/twinlake/" if SOC_INTEL_TWINLAKE && !FSP_USE_REPO
default "src/vendorcode/intel/fsp/fsp2_0/alderlake_n/" if SOC_INTEL_ALDERLAKE_PCH_N && !FSP_USE_REPO
default "src/vendorcode/intel/fsp/fsp2_0/raptorlake/" if SOC_INTEL_RAPTORLAKE && !FSP_USE_REPO
+ default "src/vendorcode/intel/fsp/fsp2_0/alderlake/" if !FSP_USE_REPO
default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE && FSP_TYPE_IOT
default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/Include/" if SOC_INTEL_RAPTORLAKE_PCH_S && FSP_TYPE_IOT
- default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE
- default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeS/Include/" if SOC_INTEL_ALDERLAKE_PCH_S && SOC_INTEL_RAPTORLAKE
default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P && FSP_TYPE_IOT
default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeS/Include/" if SOC_INTEL_ALDERLAKE_PCH_S && FSP_TYPE_IOT
+ default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Include/" if SOC_INTEL_ALDERLAKE_PCH_N && FSP_TYPE_IOT
+ default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE
+ default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeS/Include/" if SOC_INTEL_ALDERLAKE_PCH_S && SOC_INTEL_RAPTORLAKE
default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P && !SOC_INTEL_RAPTORLAKE
default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeS/Include/" if SOC_INTEL_ALDERLAKE_PCH_S
- default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Include/" if SOC_INTEL_ALDERLAKE_PCH_N && FSP_TYPE_IOT
- default "src/vendorcode/intel/fsp/fsp2_0/alderlake/" if !FSP_USE_REPO
config FSP_FD_PATH
string
depends on FSP_USE_REPO
default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/FSP.fd" if SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE && FSP_TYPE_IOT
default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/FSP.fd" if SOC_INTEL_RAPTORLAKE_PCH_S && FSP_TYPE_IOT
- default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE
- default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeS/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_S && SOC_INTEL_RAPTORLAKE
default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P && FSP_TYPE_IOT
default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeS/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_S && FSP_TYPE_IOT
+ default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_N && FSP_TYPE_IOT
+ default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE
+ default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeS/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_S && SOC_INTEL_RAPTORLAKE
default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P && !SOC_INTEL_RAPTORLAKE
default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeS/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_S
- default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_N && FSP_TYPE_IOT
# Override platform debug consent value:
# 0:Disabled, 2:Enabled (All Probes+TraceHub), 6:Enable (Low Power),
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Attention is currently required from: Elyes Haouas.
Nico Huber has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/83909?usp=email )
Change subject: include/stdbool: Don't unconditionally typedef bool
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Patch Set 7:
(1 comment)
File src/include/stdbool.h:
https://review.coreboot.org/c/coreboot/+/83909/comment/db484d6b_8a173302?us… :
PS7, Line 7: #ifndef bool
Why is this needed? Is there an issue with newer toolchains without C23?
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83919?usp=email
to look at the new patch set (#3).
Change subject: [test C23 baytrail]: Use nullptr instead of NULL
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[test C23 baytrail]: Use nullptr instead of NULL
Change-Id: Ibb9eb58550364e533e5ca3e97e44a608fe13eba0
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
---
M src/soc/intel/baytrail/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/83919/3
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83918?usp=email
to look at the new patch set (#2).
Change subject: soc/intel/baytrail: Use nullptr instead of NULL
......................................................................
soc/intel/baytrail: Use nullptr instead of NULL
nullptr was introduced in C11 spec and gcc 4.7.
https://en.cppreference.com/w/cpp/language/nullptrhttps://stackoverflow.com/questions/16256586/how-to-enable-c11-on-later-ver…
coreboot switched to GCC 4.7.2 on October 25, 2021, prior to coreboot v4.1.
https://review.coreboot.org/c/coreboot/+/1609
GCC-13 implemented nullptr constant: https://www.open-std.org/jtc1/sc22/wg14/www/docs/n3042.htm
So use it insted of NULL macro.
Change-Id: I246a7354ec223a7c9635148a58e760c4629084a4
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
---
M src/mainboard/google/rambi/mainboard.c
M src/mainboard/google/rambi/romstage.c
M src/mainboard/google/rambi/variants/ninja/lan.c
M src/mainboard/google/rambi/variants/sumo/lan.c
M src/soc/intel/baytrail/chip.c
M src/soc/intel/baytrail/dptf.c
M src/soc/intel/baytrail/gfx.c
M src/soc/intel/baytrail/gpio.c
M src/soc/intel/baytrail/hda.c
M src/soc/intel/baytrail/lpe.c
M src/soc/intel/baytrail/perf_power.c
M src/soc/intel/baytrail/pmutil.c
M src/soc/intel/baytrail/ramstage.c
M src/soc/intel/baytrail/refcode.c
M src/soc/intel/baytrail/romstage/pmc.c
M src/soc/intel/baytrail/romstage/raminit.c
M src/soc/intel/baytrail/romstage/romstage.c
M src/soc/intel/baytrail/smihandler.c
M src/soc/intel/baytrail/southcluster.c
19 files changed, 59 insertions(+), 59 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/83918/2
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