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Change subject: soc/mediatek/common: Reduce eMMC clock frequency to 400 kHz
......................................................................
Patch Set 11:
(1 comment)
File src/soc/mediatek/common/msdc.c:
https://review.coreboot.org/c/coreboot/+/84298/comment/4b8246ad_a5a20ac3?us… :
PS9, Line 432: host->src_hz = 400 * 1000 * 1000;
> Mengqi will reply later.
When we need to set a clock output frequency, we actually set a frequency division value. Originally, we set the source clock frequency to 50MHz, the target frequency to 400KHz, and the frequency division value to 125. However, the actual source clock frequency is 400MHz, so the final actual output is 400MHz/125=3.2MHz. When we set the source clock frequency correctly, we can get the correct frequency division value, and then get the correct clock output. The related code is https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/thi…
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Change subject: mb/google/corsola: Make compatible with MT8186T by modifing skuid
......................................................................
Patch Set 2: Code-Review+1
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Hello Hung-Te Lin, Xuxin Xiong, Yidi Lin, Yu-Ping Wu,
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Change subject: mb/google/corsola: Make compatible with MT8186T by modifing skuid
......................................................................
mb/google/corsola: Make compatible with MT8186T by modifing skuid
For MT8186, factory pre-flashed 0x7fffffff as default skuid and kernel
can load the corresponded dts file. To make MT8186T functional on
0x7fffffff devices, coreboot will pass skuid to kernel by 0x7ffffffe,
so kernel can get the corresponded dts file for system boot.
BUG=b:365730137
TEST=1.Pre-flashed 0x7fffffff and boot OS.
2.Check OS boot normally by 0x7ffffffe.
BRANCH=corsola
Change-Id: I91306d3abd508e104851916882fb36a4fd302036
Signed-off-by: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com>
---
M src/mainboard/google/corsola/boardid.c
1 file changed, 10 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/84342/2
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Change subject: mb/google/corsola: Make compatible with MT8186T by modifing skuid
......................................................................
mb/google/corsola: Make compatible with MT8186T by modifing skuid
For MT8186, factory pre-flashed 0x7fffffff as default skuid and kernel
can load the corresponded dts file. To make MT8186T functional on
0x7fffffff devices, coreboot will pass skuid to kernel by 0x7ffffffe,
so kernel can get the corresponded dts file for system boot.
BUG=b:365730137
TEST=1.Pre-flashed 0x7fffffff and boot OS.
2.Check OS boot normally by 0x7ffffffe.
BRANCH=corsola
Change-Id: I91306d3abd508e104851916882fb36a4fd302036
Signed-off-by: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com>
---
M src/mainboard/google/corsola/boardid.c
1 file changed, 10 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/84342/1
diff --git a/src/mainboard/google/corsola/boardid.c b/src/mainboard/google/corsola/boardid.c
index 443c3d1..5fb6457 100644
--- a/src/mainboard/google/corsola/boardid.c
+++ b/src/mainboard/google/corsola/boardid.c
@@ -5,6 +5,7 @@
#include <console/console.h>
#include <ec/google/chromeec/ec.h>
#include <soc/auxadc.h>
+#include <soc/cpu_id.h>
#include "panel.h"
@@ -12,6 +13,9 @@
#define ADC_LEVELS 12
+/* Define compatible sku_id value */
+#define CROS_SKU_COM 0x7FFFFFFE
+
enum {
/* RAM IDs */
RAM_ID_LOW_CHANNEL = 2,
@@ -125,6 +129,12 @@
printk(BIOS_WARNING, "Failed to get SKU code from EC\n");
cached_sku_code = (get_adc_index(SKU_ID_HIGH_CHANNEL) << 4 |
get_adc_index(SKU_ID_LOW_CHANNEL));
+ } else if (CONFIG(BOARD_GOOGLE_STEELIX) &&
+ get_cpu_id() == MTK_CPU_ID_MT8186T) {
+ printk(BIOS_DEBUG, "enter configure_ec: current is MT8686T\n");
+ if (cached_sku_code == CROS_SKU_UNPROVISIONED) {
+ cached_sku_code = CROS_SKU_COM;
+ }
}
printk(BIOS_DEBUG, "SKU Code: %#02x\n", cached_sku_code);
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Change subject: lib/jpeg: return string (not int) error messages
......................................................................
lib/jpeg: return string (not int) error messages
Change-Id: I465a6eebc2a41ca9a618b1e86dee015cea40800b
Signed-off-by: Nigel Tao <nigeltao(a)golang.org>
---
M src/lib/bootsplash.c
M src/lib/jpeg.c
M src/lib/jpeg.h
3 files changed, 29 insertions(+), 35 deletions(-)
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Change subject: lib/jpeg: return string (not int) error messages
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
What do you think?
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Change subject: lib/jpeg: enable dst-pixel-format allowlist
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
What do you think?
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Hello build bot (Jenkins),
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Change subject: lib/jpeg: return string (not int) error messages
......................................................................
lib/jpeg: return string (not int) error messages
Change-Id: I465a6eebc2a41ca9a618b1e86dee015cea40800b
Signed-off-by: Nigel Tao <nigeltao(a)golang.org>
---
M src/lib/bootsplash.c
M src/lib/jpeg.c
M src/lib/jpeg.h
3 files changed, 29 insertions(+), 35 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/84341/3
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Change subject: lib/jpeg: enable dst-pixel-format allowlist
......................................................................
lib/jpeg: enable dst-pixel-format allowlist
Wuffs can decode image files to a variety of pixel formats (BGRA vs
RGBA, premultiplied vs non-premultiplied alpha, 8-bit vs 16-bit, etc).
If coreboot always decodes to BGRA and never to RGBA then we can cut out
the unused code paths at compile time, via configuration macros.
Before fallback/ramstage 84180 LZMA (174340 decompressed)
After fallback/ramstage 83513 LZMA (173056 decompressed) = 99.21%
It's not a large saving, but every little bit helps.
Change-Id: Ie29592f74f245cb890d18b68060640e9bab192b2
Signed-off-by: Nigel Tao <nigeltao(a)golang.org>
---
M src/lib/jpeg.c
1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/84340/3
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