Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83662?usp=email )
Change subject: mb/google/brox/variants/brox: remove PL4 value modification
......................................................................
mb/google/brox/variants/brox: remove PL4 value modification
Remove PL4 value modification based on PsysPL3 value.
BUG=None
BRANCH=None
TEST=Built and boot on brox system
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com>
Change-Id: Ic7fbc6386769aa9f76a8665a742c97dfd790fd1d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83662
Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com>
Reviewed-by: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Eric Lai <ericllai(a)google.com>
---
M src/mainboard/google/brox/variants/baseboard/brox/ramstage.c
1 file changed, 0 insertions(+), 4 deletions(-)
Approvals:
Sowmya Aralguppe: Looks good to me, but someone else must approve
Karthik Ramasubramanian: Looks good to me, approved
build bot (Jenkins): Verified
Eric Lai: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/brox/variants/baseboard/brox/ramstage.c b/src/mainboard/google/brox/variants/baseboard/brox/ramstage.c
index be1ba08..038255f 100644
--- a/src/mainboard/google/brox/variants/baseboard/brox/ramstage.c
+++ b/src/mainboard/google/brox/variants/baseboard/brox/ramstage.c
@@ -156,10 +156,6 @@
/* Limit PL2 if the adapter is with lower capability */
pl2 = (psyspl2 > pl2_default) ? pl2_default : SET_PL2(config_psys->efficiency, watts);
- /* If PL4 > psyspl3, lower it */
- if (soc_config->tdp_pl4 > psyspl3)
- soc_config->tdp_pl4 = psyspl3;
-
/* now that we're done calculating, set everything */
soc_config->tdp_pl2_override = pl2;
soc_config->tdp_psyspl2 = psyspl2;
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Attention is currently required from: Arthur Heymans, Hung-Te Lin, Yidi Lin, Yu-Ping Wu.
Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/84208?usp=email
to look at the new patch set (#7).
The following approvals got outdated and were removed:
Verified-1 by build bot (Jenkins)
Change subject: include/assert.h: Rewrite using static inline
......................................................................
include/assert.h: Rewrite using static inline
With LTO GCC assert gets false positives using macros. Rewriting it with
a static inline where int conversion is disabled works however.
Change-Id: I6185e87a374f8722dba545d6bbce1c3a8de53e7e
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/acpi/acpigen.c
M src/cpu/x86/mtrr/mtrr.c
M src/include/assert.h
M src/lib/coreboot_table.c
4 files changed, 36 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/84208/7
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Change subject: mb/google/brox: Fix booting to kernel without battery
......................................................................
mb/google/brox: Fix booting to kernel without battery
When battery is disconnected and only adaptor is connected higher PL2
power draw causes cpu brown out and system does not boot to kernel. To
avoid this set Boot frequency UPD to 1. Reduce PL4 value to overcome
power spikes from SoC during boot. Remove Psys implementation as it
impacts active state platform performance.
BUG=b:335046538,b:329722827
BRANCH=None
TEST=Able to successfully boot on 3 different Brox proto2 SKU1
and SKU2 boards with 65W, 45W and 30W adaptors for 3
iterations of cold boot.
Change-Id: I58e136c607ea9290ecac0cee453d6632760a6433
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com>
---
M src/mainboard/google/brox/Kconfig
M src/mainboard/google/brox/romstage.c
M src/mainboard/google/brox/variants/baseboard/brox/ramstage.c
M src/mainboard/google/brox/variants/brox/ramstage.c
M src/soc/intel/alderlake/chip.h
5 files changed, 59 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/83752/31
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Sowmya Aralguppe has posted comments on this change by Sowmya Aralguppe. ( https://review.coreboot.org/c/coreboot/+/83752?usp=email )
Change subject: mb/google/brox: Fix booting to kernel without battery
......................................................................
Patch Set 30:
(7 comments)
File src/mainboard/google/brox/variants/baseboard/brox/ramstage.c:
https://review.coreboot.org/c/coreboot/+/83752/comment/8e6ee19a_f470f608?us… :
PS28, Line 61: if (!num_entries)
: return;
> why are we skipping this check now ?
added back - basically this is array size and I thought it might not be of much value add .Instead i added num_entries print while searching for sku .But anyway i have reverted the change
https://review.coreboot.org/c/coreboot/+/83752/comment/c77d7a1c_328001d7?us… :
PS28, Line 81: 1000
> ideally this is better to modify in a separate CL. […]
Acknowledged - but this was part of the review comment for this patchthat i addressed
https://review.coreboot.org/c/coreboot/+/83752/comment/383bf5b7_d1f3f9a5?us… :
PS28, Line 141: if (CONFIG(EC_GOOGLE_CHROMEEC) && google_chromeec_is_battery_present_and_above_critical_threshold()) {
> was it more than > 96 ?
yes - please dont review variant_update_psys_power_limits - i will remove this module in a separate patch .Other variants were calling this function so had to keep this temporarily to avoid build errors
https://review.coreboot.org/c/coreboot/+/83752/comment/e58aba39_ab11403d?us… :
PS28, Line 45: printk(BIOS_ERR, "Cannot find brox sku index (mchid = %u) in %lu entries\n",
: mchid, num_entries);
> submit a separate CL for this
reverted the change
https://review.coreboot.org/c/coreboot/+/83752/comment/0950e416_3788ed5b?us… :
PS28, Line 56: if (config->tdp_pl4 == 0) {
> nit […]
Done
https://review.coreboot.org/c/coreboot/+/83752/comment/e6a70f31_87beb8f4?us… :
PS28, Line 59: (CONFIG_PL4_LIMIT_FOR_CRITICAL_BAT_BOOT)
> u don't need additional braces for this config check
Done
https://review.coreboot.org/c/coreboot/+/83752/comment/4e034e00_d6a25fb1?us… :
PS28, Line 79: policy_dev = DEV_PTR(dptf_policy);
: if (!policy_dev) {
: printk(BIOS_INFO, "DPTF policy not set\n");
: return;
: }
> why are we not keeping the previous code ? […]
I just put dptf policy check above pl4 override - thought that would be right thing to do .but i have reverted this as its causing more confusion by making patch set changes non readable
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