Attention is currently required from: Cliff Huang, Kapil Porwal, Pranava Y N, Subrata Banik.
Hello Kapil Porwal, Pranava Y N, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83798?usp=email
to look at the new patch set (#37).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage
......................................................................
soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage
List of changes:
1. Add required SoC programming till ramstage.
2. Include only required headers into include/soc.
3. Skeleton code used to call FSP-S API.
BUG=b:348678529
TEST=Verified on Intel® Simics® Pre Silicon Simulation platform
for PTL using google/fatcat mainboard.
Change-Id: Idc6fb11e9e84c28c7567ae2b7abc1ab832a88362
Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com>
---
M src/soc/intel/pantherlake/Kconfig
M src/soc/intel/pantherlake/Makefile.mk
A src/soc/intel/pantherlake/acpi.c
A src/soc/intel/pantherlake/chip.c
M src/soc/intel/pantherlake/chip.h
A src/soc/intel/pantherlake/cpu.c
A src/soc/intel/pantherlake/crashlog.c
A src/soc/intel/pantherlake/cse_telemetry.c
A src/soc/intel/pantherlake/elog.c
A src/soc/intel/pantherlake/finalize.c
A src/soc/intel/pantherlake/fsp_params.c
A src/soc/intel/pantherlake/gspi.c
A src/soc/intel/pantherlake/i2c.c
A src/soc/intel/pantherlake/include/soc/cpu.h
A src/soc/intel/pantherlake/include/soc/crashlog.h
A src/soc/intel/pantherlake/include/soc/dptf.h
A src/soc/intel/pantherlake/include/soc/espi.h
M src/soc/intel/pantherlake/include/soc/iomap.h
A src/soc/intel/pantherlake/include/soc/irq.h
A src/soc/intel/pantherlake/include/soc/itss.h
A src/soc/intel/pantherlake/include/soc/me.h
A src/soc/intel/pantherlake/include/soc/nvs.h
A src/soc/intel/pantherlake/include/soc/pcie.h
M src/soc/intel/pantherlake/include/soc/pmc.h
A src/soc/intel/pantherlake/include/soc/ramstage.h
A src/soc/intel/pantherlake/include/soc/serialio.h
A src/soc/intel/pantherlake/include/soc/tcss.h
A src/soc/intel/pantherlake/include/soc/usb.h
A src/soc/intel/pantherlake/lockdown.c
A src/soc/intel/pantherlake/me.c
A src/soc/intel/pantherlake/p2sb.c
A src/soc/intel/pantherlake/pcie_rp.c
A src/soc/intel/pantherlake/pmc.c
A src/soc/intel/pantherlake/pmutil.c
A src/soc/intel/pantherlake/retimer.c
A src/soc/intel/pantherlake/smihandler.c
A src/soc/intel/pantherlake/soundwire.c
A src/soc/intel/pantherlake/spi.c
A src/soc/intel/pantherlake/systemagent.c
A src/soc/intel/pantherlake/tcss.c
A src/soc/intel/pantherlake/uart.c
A src/soc/intel/pantherlake/xhci.c
42 files changed, 3,728 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/83798/37
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Saurabh Mishra has uploaded a new patch set (#47) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/83772?usp=email )
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: soc/intel/ptl: Add SoC ACPI directory for Panther Lake
......................................................................
soc/intel/ptl: Add SoC ACPI directory for Panther Lake
List of changes:
1. Select common ACPI Kconfig to include common ACPI code block
from IA-common code
2. Select ACPI Kconfig support for wake up from sleep states.
3. Add SoC ASL code for SoC IPs like IPU, HDA etc.
4. PTL replaces DMI3 with SAF, to ensure
common/block/acpi/acpi/northbridge.asl binding with PTL change,
#if DMI_BASE_SIZE gaurd check is added in northbridge.asl
BUG=b:348678529
TEST=Verified on Intel® Simics® Pre Silicon Simulation platform
for PTL using google/fatcat mainboard.
Change-Id: Ia5cf899b049cb8eb27b4ea30c7f3ce7a14884f15
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com>
---
M src/soc/intel/common/block/acpi/acpi/northbridge.asl
M src/soc/intel/pantherlake/Kconfig
A src/soc/intel/pantherlake/acpi/camera_clock_ctl.asl
A src/soc/intel/pantherlake/acpi/hda.asl
A src/soc/intel/pantherlake/acpi/pcie.asl
A src/soc/intel/pantherlake/acpi/serialio.asl
A src/soc/intel/pantherlake/acpi/southbridge.asl
A src/soc/intel/pantherlake/acpi/tcss.asl
A src/soc/intel/pantherlake/acpi/tcss_dma.asl
A src/soc/intel/pantherlake/acpi/tcss_pcierp.asl
A src/soc/intel/pantherlake/acpi/tcss_xhci.asl
A src/soc/intel/pantherlake/acpi/xhci.asl
12 files changed, 2,002 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/83772/47
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Sumeet R Pawnikar has posted comments on this change by hualin wei. ( https://review.coreboot.org/c/coreboot/+/83929?usp=email )
Change subject: mb/google/dedede/var/awasuki: Modify DPTF parameters
......................................................................
Patch Set 7:
(1 comment)
Patchset:
PS7:
Add me in bug to check the history and other details to review these changes.
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Change subject: mb/google/ovis/var/deku: Set TCC_offset to 12
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/google/ovis/var/deku: Set TCC_offset to 12
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