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Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till romstage
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Patch Set 83:
(1 comment)
File src/soc/intel/pantherlake/chipset.cb:
https://review.coreboot.org/c/coreboot/+/83635/comment/e2e68946_2356b65b?us… :
PS83, Line 51: on
I missed this during the review. why are we making IAA default on? if this is CrOS specific then we can do the same from fatcat
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Change subject: mb/google/rauru: Initialize flash controller in bootblock
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Patch Set 10:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83924/comment/cffdae2a_049a6d93?us… :
PS10, Line 9: SPI
Is this supposed to be "Serial" or "SPI"?
https://review.coreboot.org/c/coreboot/+/83924/comment/61288db7_7e1ddf7b?us… :
PS10, Line 9: (
Space before `(`.
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Change subject: soc/mediatek/mt8196: Add NOR-Flash support
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Patch Set 10:
(2 comments)
File src/soc/mediatek/mt8196/include/soc/spi.h:
https://review.coreboot.org/c/coreboot/+/83923/comment/c15fb413_35a5b2cb?us… :
PS10, Line 12:
Can we add a comment explaining what SNFC stands for (I found the term on https://www.mouser.com/datasheet/2/1074/MTK_MT8370_Application_Processor_Da…
```
Initialize Serial NOR Flash Controller (SNFC).
```
File src/soc/mediatek/mt8196/spi.c:
https://review.coreboot.org/c/coreboot/+/83923/comment/00b04785_9ff8264a?us… :
PS10, Line 17: #define PAD_FUNC(name, func) {GPIO(name), PAD_##name##_FUNC_##func}
: #define PAD_FUNC_GPIO(name) {GPIO(name), 0}
Not used
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Change subject: soc/mediatek: Move SNFC pad_func into MediaTek common directory
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Patch Set 3:
(1 comment)
File src/soc/mediatek/common/snfc.c:
https://review.coreboot.org/c/coreboot/+/83989/comment/ae260061_acc2954b?us… :
PS1, Line 17: 14
> It seems to me that we can convert `enum gpio_drv` into `mA` by `(drive_strength + 1) * 2`.
The `(drive_strength + 1) * 2` calculation should be in a function (such as `gpio_drv_ma`) in gpio_common.h. Alternatively, just print the enum value here for now.
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