Felix Held has posted comments on this change by Jędrzej Ciupis. ( https://review.coreboot.org/c/coreboot/+/83884?usp=email )
Change subject: soc/intel/jasperlake: Add CrashLog implementation for Intel JSL
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Patch Set 3:
(1 comment)
File src/soc/intel/jasperlake/crashlog_lib.c:
PS2:
> Thanks for the comment, it's a fair point. I considered reworking the code when preparing the patch. […]
sure, i'm fine with keeping it as it is right now, which is why i had my comment marked as resolved and submitted the patch. so that was just a suggestion
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Change subject: nb/intel/haswell: Move SPD addresses to devicetree
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Patch Set 6: Code-Review+2
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Change subject: Documentation/releases: Add 24.11 release notes template
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Patch Set 3: Code-Review+2
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Change subject: Makefile.mk: Suppress stack-usage LTO link warning
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Patch Set 7: Code-Review+2
(1 comment)
Patchset:
PS7:
> > Does clang allow suppressing warnings from within the . […]
Ah right, it's a link-time warning. Okay, then I think this is okay.
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Change subject: documentation/release: Update release checklist
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Patch Set 3: Code-Review+2
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Change subject: soc/intel/pmclib.c: Work around compiler bug -Werror=stringop-overread
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Patch Set 8:
(1 comment)
File src/soc/intel/common/block/pmc/pmclib.c:
https://review.coreboot.org/c/coreboot/+/84042/comment/5be672ec_d05c72db?us… :
PS8, Line 354: if (array_size > 0)
Hmmm, actually, why not move the check inside `print_num_status_bits()`?
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Change subject: drivers/intel/opregion.c: Also set vbt_size if size is 0
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Patch Set 7: Code-Review+2
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Change subject: ext_stage_cache: Make sure variables are initialized
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Patch Set 7: Code-Review+1
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/84040/comment/342f7e49_ff66d73d?us… :
PS7, Line 10:
> Maybe add: `Also exit gracefully from stage-cache code if no smm region is found.` […]
Can the stage cache be disabled?
File src/cpu/x86/smm/tseg_region.c:
https://review.coreboot.org/c/coreboot/+/84040/comment/28e6a77c_57ca28d8?us… :
PS7, Line 34: return -1;
> Hmmm, do we ever link this path? Because here start/size would […]
+1
File src/lib/ext_stage_cache.c:
https://review.coreboot.org/c/coreboot/+/84040/comment/3734cdfc_bb87d109?us… :
PS7, Line 18: stage_cache_external_region(&base, &size);
: if (base == NULL || size == 0)
: return;
Would it make sense to return status from `stage_cache_external_region()`?
```suggestion
if (stage_cache_external_region(&base, &size))
return;
```
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