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Change subject: util/superiotool: Add extra selectors support
......................................................................
util/superiotool: Add extra selectors support
Some chips have specific selectors (in addition to LDN-register) that
affect the register space. At the same time, the utility doesn't provide
a simple and convenient method for configuring such selectors (as in the
case of LDN-selector) to create a dump, because this may be configured
by several fields of the register, and the values of its other fields
should not change after setting in the BIOS (fintek [1,2]).
Just add a structure with an index, mask, and value for the selector
inside the superio_registers chip for the corresponding LDN to switch
the register bank:
{FINTEK_F81966_DID, "F81962/F81964/F81966/F81967", {
* * *
{NOLDN, "Global",
{0x28,0x2a,0x2b,0x2c,EOT},
{0x00,0x00,0x00,0x00,EOT},
{.idx = 0x27, .mask = 0xd, .val = 0x1} /* update extra selector */
},
{0x03, "LPT",
{0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
{NANA,0x03,0x78,0x07,0x03,0xc2,EOT} /* without extra selector */
},
* * *
Tested with Fintek F81966 on Asrock IMB-1222:
- run superiotool on Ubuntu and dump the registers for the board with
the vendor's firmware;
- add the superio chip initialization code to the board configuration
in coreboot and build the project;
- boot Ubuntu on the board with coreboot and re-dump the registers;
- the register values from the board configuration code are the same
in both dumps.
The changes do not affect the configuration of existing chips, which
was tested on the Asrock H110-STX motherboard with Nuvoton NCT5539D
(the dump before and after the changes are the same).
[1] CB:83004
[2] CB:83019
Change-Id: If56af9f977381e637245bdd26563f5ba7e6cbead
Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com>
---
M util/superiotool/superiotool.c
M util/superiotool/superiotool.h
2 files changed, 33 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/83196/5
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Change subject: util/superiotool/fintek: Add f81866 register table
......................................................................
util/superiotool/fintek: Add f81866 register table
In accordance with the F81866A datasheet:
Release Date: Jan, 2012, Version: V0.14P [1].
[1] https://web.archive.org/web/20240707051837/http://www.
jetwaycomputer.com/download/Fintek/F81866_wdt_gpio.zip
Change-Id: I4367a1129fe628e7bf05d49678ea1c3718da710b
Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com>
---
M util/superiotool/fintek.c
1 file changed, 179 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/83004/15
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: util/superiotool/fintek: Add f81966 register table
......................................................................
util/superiotool/fintek: Add f81966 register table
In accordance with the F81962/F81964/F81966/F81967 datasheet:
Release Date: Feb, 2018, Version: V0.18P [1].
[1] https://web.archive.org/web/20240707052102/http://www.jetwaycomputer.com/download/Fintek/F81966_wdt_gpio.zip
Change-Id: Ic3418c337883538e47eb181cbe1ad2dc828e12a1
Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com>
---
M util/superiotool/fintek.c
1 file changed, 157 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/83019/14
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Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83461?usp=email )
Change subject: commonlib: Add ELOG_TYPE_FW_LATE_SOL eventLog type
......................................................................
commonlib: Add ELOG_TYPE_FW_LATE_SOL eventLog type
Add a new eventLog type of ELOG_TYPE_FW_LATE_SOL to support logging
when we show late (from payload) Signs Of Life (SOL) to the user.
BUG=b:305898363
TEST=Event shows in eventlog tool after CSE sync:
```
Late Sign of Life | CSE Sync Late SOL Screen Shown
```
Change-Id: Ibbe9f37a791e5c2a0c6e982942cf3043a2bd4b45
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83461
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Dinesh Gehlot <digehlot(a)google.com>
---
M src/commonlib/bsd/include/commonlib/bsd/elog.h
1 file changed, 6 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Dinesh Gehlot: Looks good to me, approved
diff --git a/src/commonlib/bsd/include/commonlib/bsd/elog.h b/src/commonlib/bsd/include/commonlib/bsd/elog.h
index 31bb8fc..efc4d6e 100644
--- a/src/commonlib/bsd/include/commonlib/bsd/elog.h
+++ b/src/commonlib/bsd/include/commonlib/bsd/elog.h
@@ -381,6 +381,12 @@
*/
#define ELOG_TYPE_FW_SPLASH_SCREEN 0xbb
+/*
+ * Events related to CSE sync from payload
+ */
+#define ELOG_TYPE_FW_LATE_SOL 0xbc
+#define ELOG_FW_LATE_SOL_CSE_SYNC 0x0
+
/* Only the 7-LSB are used for size */
#define ELOG_MAX_EVENT_SIZE 0x7F
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Change subject: mb/google/dedede/var/awasuki: Add initial GPIOs config
......................................................................
Patch Set 5: Code-Review+1
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Change subject: commonlib/device_tree.c: Add read reg property helper
......................................................................
Patch Set 3:
(1 comment)
File src/commonlib/device_tree.c:
https://review.coreboot.org/c/coreboot/+/83457/comment/d1b15d5b_f928bd5d?us… :
PS3, Line 1013: size_t count = prop->prop.size / (4 * addr_cells + 4 * size_cells);
Can we factor out everything starting here into a common function that's used by both (dt and fdt)?
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Change subject: mb/google/dedede/var/awasuki: Add initial GPIOs config
......................................................................
Patch Set 5: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83449/comment/82c5b097_1f72925c?us… :
PS4, Line 7: UPSTREAM:
> Not needed.
Done
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Change subject: mb/google/dedede/var/awasuki: Add initial GPIOs config
......................................................................
mb/google/dedede/var/awasuki: Add initial GPIOs config
Configure GPIOs according to schematics revision 20240712.
BUG=b:351968527
TEST=abuild -v -a -x -c max -p none -t google/dedede -b awasuki
Change-Id: Ic8f346b788b489f50ab96c0ace8541720a832f72
Signed-off-by: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com>
---
A src/mainboard/google/dedede/variants/awasuki/Makefile.mk
A src/mainboard/google/dedede/variants/awasuki/gpio.c
2 files changed, 66 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/83449/5
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