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Change subject: mb/google/dedede: Create awasuki variant
......................................................................
Patch Set 13: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83376/comment/231bc579_3924241d?us… :
PS12, Line 12: (Auto-Generated by create_coreboot_variant.sh version 4.5.0).
> It’d be also be nice if the Chromium folks could fix the script.
Done
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Weimin Wu has uploaded a new patch set (#13) to the change originally created by Tongtong Pan. ( https://review.coreboot.org/c/coreboot/+/83376?usp=email )
Change subject: mb/google/dedede: Create awasuki variant
......................................................................
mb/google/dedede: Create awasuki variant
Create the awasuki variant of the waddledee reference board by copying
the template files to a new directory named for the variant.
(Auto-Generated by create_coreboot_variant.sh version 4.5.0)
BUG=b:351968527
BRANCH=None
TEST=util/abuild/abuild -p none -t google/dedede -x -a
make sure the build includes GOOGLE_AWASUKI
Change-Id: If18afc92afdbdff5df3f5b034f4357feda6690b0
Signed-off-by: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com>
---
M src/mainboard/google/dedede/Kconfig
M src/mainboard/google/dedede/Kconfig.name
A src/mainboard/google/dedede/variants/awasuki/include/variant/ec.h
A src/mainboard/google/dedede/variants/awasuki/include/variant/gpio.h
A src/mainboard/google/dedede/variants/awasuki/memory/Makefile.mk
A src/mainboard/google/dedede/variants/awasuki/memory/dram_id.generated.txt
A src/mainboard/google/dedede/variants/awasuki/memory/mem_parts_used.txt
A src/mainboard/google/dedede/variants/awasuki/overridetree.cb
8 files changed, 86 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/83376/13
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Change subject: src/mainboard/dell/snb_ivb_workstations/: Add variant
......................................................................
Patch Set 7:
(5 comments)
Patchset:
PS7:
Overall looks good.
Commit Message:
https://review.coreboot.org/c/coreboot/+/83473/comment/ef1d2eb0_9cddc296?us… :
PS7, Line 7: src/mainboard/dell/snb_ivb_workstations/: Add variant
> mb/dell/snb_ivb_workstations: Add SFF variant
mb/dell/snb_ivb_workstations: Add OptiPlex 9010 MT variant
https://review.coreboot.org/c/coreboot/+/83473/comment/77991fa9_0245d447?us… :
PS7, Line 9: T1650
> Isn’t that a Precision.
Yes, it is. But as mentioned below in the commit message, boards are the same.
https://review.coreboot.org/c/coreboot/+/83473/comment/72325802_b0c89e3f?us… :
PS7, Line 11: The OptiPlexes and Precision use different PCH SKUs, but they use the same PCB.
> The diff only seems to change OptiPlex stuff?
Because it is an OptiPlex being added.
File src/mainboard/dell/snb_ivb_workstations/Kconfig:
https://review.coreboot.org/c/coreboot/+/83473/comment/f7b53162_89083f5f?us… :
PS7, Line 41: default "OptiPlex 7010/9010 MT" if BOARD_DELL_OPTIPLEX_9010_MT
7010 series will most likely need separate Kconfigs, because the subsystem IDs and SMBIOS will need to be different. The commit message says it adds 9010 MT and let's stick to it.
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Change subject: util/superiotool/fintek: Add f81866 register table
......................................................................
Patch Set 15: Code-Review+1
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Change subject: mb/google/brya/var/xol: Limit power limits for low/no battery case
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/google/brya/variants/xol/ramstage.c:
https://review.coreboot.org/c/coreboot/+/83479/comment/86e29be5_7dcb1975?us… :
PS2, Line 52: if (soc_config->tdp_pl2_override > watts)
> in this case, you don't need this and below right?
Sorry, just modified the patch. We would use up to 30W/40W for PL2/PL4 in case of critical battery or no battery condition.
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Change subject: util/superiotool: Add extra selectors support
......................................................................
Patch Set 5: Code-Review+1
(1 comment)
File util/superiotool/superiotool.c:
https://review.coreboot.org/c/coreboot/+/83196/comment/ffc82727_30bc1e92?us… :
PS5, Line 87: static void set_extra_selector(uint16_t port, const struct extra_selector *esel)
: {
: if (esel->idx == 0) /* entry without extra selector */
: return;
:
: uint8_t reg_val = regval(port, esel->idx);
: reg_val &= ~esel->mask;
: reg_val |= esel->val;
: regwrite(port, esel->idx, reg_val);
:
: reg_val = regval(port, esel->idx) & esel->mask;
:
: printf(" -- ESEL[%02xh] 0x%02x", esel->idx, reg_val);
: if (esel->name != NULL)
: printf(" (%s)", esel->name);
: printf(" --");
:
: if (verbose)
: printf(" config: idx=%02xh, mask=%02xh, val=%02xh state --", esel->idx, esel->mask,
: esel->val);
: }
:
What does this look like in the superiotool output? I don't see any newlines so it seems like it would print a very long line.
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Change subject: mb/google/brya/var/xol: Limit power limits for low/no battery case
......................................................................
Patch Set 2:
(1 comment)
File src/mainboard/google/brya/variants/xol/ramstage.c:
https://review.coreboot.org/c/coreboot/+/83479/comment/588290bb_7750aed5?us… :
PS2, Line 52: if (soc_config->tdp_pl2_override > watts)
in this case, you don't need this and below right?
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Change subject: mb/google/brya/var/xol: Limit power limits for low/no battery case
......................................................................
Patch Set 2: Code-Review+1
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Hello Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83479?usp=email
to look at the new patch set (#2).
Change subject: mb/google/brya/var/xol: Limit power limits for low/no battery case
......................................................................
mb/google/brya/var/xol: Limit power limits for low/no battery case
Xol has a shutdown issue on our reliability test environment:
- High temperature
- No battery condition
It needs to have margin for the PL2 and PL4 values from the adapter
power, this will limit the PL2/PL4 values up to 30W/40W for xol's
45W power adapter. The new values are confirmed by our power team.
BUG=b:353395811
BRANCH=brya
TEST=built and verified MSR PL2/PL4 values.
Intel doc #614179 introduces how to check current PL values.
[Original MSR PL1/PL2/PL4 register values for xol]
cd /sys/class/powercap/intel-rapl/intel-rapl\:0/
grep . *power_limit*
constraint_0_power_limit_uw:15000000 <= MSR PL1 (15W)
constraint_1_power_limit_uw:55000000 <= MSR PL2 (55W)
constraint_2_power_limit_uw:114000000 <= MSR PL4 (114W)
[When connected 60W adapter without battery]
Before:
constraint_0_power_limit_uw:15000000
constraint_1_power_limit_uw:55000000
constraint_2_power_limit_uw:60000000
After:
constraint_0_power_limit_uw:15000000
constraint_1_power_limit_uw:30000000
constraint_2_power_limit_uw:40000000
[When connected 45W adapter without battery]
Before:
constraint_0_power_limit_uw:15000000
constraint_1_power_limit_uw:45000000
constraint_2_power_limit_uw:45000000
After:
constraint_0_power_limit_uw:15000000
constraint_1_power_limit_uw:30000000
constraint_2_power_limit_uw:40000000
Change-Id: Ic19119042ffdcc15c72764d8c27bcdce9f229438
Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/xol/ramstage.c
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/83479/2
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