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Change subject: mb/google/dedede/var/awasuki: Add initial GPIOs config
......................................................................
Patch Set 5: Code-Review+2
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Change subject: mb/google/brya: Standardize TPM TIS ACPI interrupt configuration
......................................................................
Patch Set 2:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83493/comment/e10bdfb5_aa0cd2ea?us… :
PS1, Line 19: TEST=Builds successfully for all brya boards.
> Any changes with timeless build?
Acknowledged
File src/mainboard/google/brya/Kconfig:
https://review.coreboot.org/c/coreboot/+/83493/comment/a2597145_c0afb51e?us… :
PS1, Line 787:
> I would have thought, such configuration would happen in devicetree.
not necessary, TPM_TIS_ACPI_INTERRUPT
https://review.coreboot.org/c/coreboot/+/83493/comment/abaa9ce9_7bf8ead4?us… :
PS1, Line 787:
> I would have thought, such configuration would happen in devicetree.
not necessary, TPM_TIS_ACPI_INTERRUPT is a config inside tpm_tis.c code hence, we are only overriding it using mainboard Kconfig file.
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Change subject: soc/intel/meteorlake: Remove p2sb.c from bootblock build
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83489/comment/fefd20e5_137ea31f?us… :
PS2, Line 10: Meteorlake platform.
> Meteor Lake
Acknowledged
https://review.coreboot.org/c/coreboot/+/83489/comment/c11a2095_cf8d1842?us… :
PS2, Line 13: TEST=Builds successfully for google/rex.
> No file size is changed though, right, as nothing was actually added before?
yes, that is right.
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Hello Dinesh Gehlot, Eran Mitrani, Eric Lai, Jakub Czapiga, Kapil Porwal, Paul Menzel, Tarun, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83489?usp=email
to look at the new patch set (#3).
Change subject: soc/intel/meteorlake: Remove p2sb.c from bootblock build
......................................................................
soc/intel/meteorlake: Remove p2sb.c from bootblock build
This patch removes `p2sb.c` from the bootblock build for the
Meteor Lake platform.
BUG=none
TEST=Builds successfully for google/rex.
Change-Id: Ib2beeee68bb20568888d4b555c2fa82e0bf0fd3c
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
---
M src/soc/intel/meteorlake/Makefile.mk
1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/83489/3
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The change is no longer submittable: All-Comments-Resolved is unsatisfied now.
Change subject: mb/google/brya: Standardize TPM TIS ACPI interrupt configuration
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/google/brya/Kconfig:
https://review.coreboot.org/c/coreboot/+/83493/comment/e03c776e_91781e19?us… :
PS1, Line 787:
I would have thought, such configuration would happen in devicetree.
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Change subject: superio/ite,mb: Switch the mainboards' code to the new ITE GPIO driver
......................................................................
Patch Set 2: Code-Review+1
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83469/comment/671e711c_4069edf6?us… :
PS2, Line 7: Switch the mainboards' code to the new ITE GPIO driver
> Use new ITE GPIO driver
or
> Switch to new ITE GPIO driver
https://review.coreboot.org/c/coreboot/+/83469/comment/60dfb740_231ead8b?us… :
PS2, Line 9: and remove any custom
: driver in the respective ITE SIO chip directory
Make it a separate commit?
https://review.coreboot.org/c/coreboot/+/83469/comment/e738cd72_572b014a?us… :
PS2, Line 11:
Any hints for testers how to test this?
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Change subject: sb/intel/i82801gx/lpc.c: Refactor i82801gx_gpi_routing()
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83492/comment/74c1335c_b22593ec?us… :
PS3, Line 8:
Please elaborate why the new version is better.
File src/southbridge/intel/i82801gx/lpc.c:
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PS3, Line 118: int i;
size_t?
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Change subject: soc/intel/meteorlake: Remove p2sb.c from bootblock build
......................................................................
Patch Set 2: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83489/comment/c2d727a1_7ed78a09?us… :
PS2, Line 10: Meteorlake platform.
Meteor Lake
https://review.coreboot.org/c/coreboot/+/83489/comment/31353283_0d5a4a84?us… :
PS2, Line 13: TEST=Builds successfully for google/rex.
No file size is changed though, right, as nothing was actually added before?
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Change subject: vc/google/chromeos: Add configurable compression for logo file in cbfs
......................................................................
Patch Set 4:
(2 comments)
Patchset:
PS4:
Nice. Thank you for providing the numbers.
Commit Message:
https://review.coreboot.org/c/coreboot/+/83420/comment/9048cf73_c3308512?us… :
PS4, Line 12: Based on logo file content, enabling LZ4 compression could save upto
: ~2ms in boot time, with increase in file size ~2KB.
What logo and what CPU, flash ROM chip was used for testing?
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