Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83543?usp=email )
(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: mb/google/brya: Enable SKIP_RAM_ID_STRAPS for TRULO variant
......................................................................
mb/google/brya: Enable SKIP_RAM_ID_STRAPS for TRULO variant
This change enables SKIP_RAM_ID_STRAPS for the TRULO board variant as
this board design won't stuff MEM strap GPIO hence, sets the static
SPD ID to 0 for the MT62F512M32D2DR-031 DRAM part.
BUG=b:351976770
TEST=Able to build google/trulo.
Change-Id: I1acb4680a143611c55f4fa6e032fde38c62af054
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83543
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Dinesh Gehlot <digehlot(a)google.com>
Reviewed-by: Eric Lai <ericllai(a)google.com>
---
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/brya/variants/trulo/memory.c
2 files changed, 16 insertions(+), 0 deletions(-)
Approvals:
Dinesh Gehlot: Looks good to me, approved
Eric Lai: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 95107c9..a5bae12 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -550,6 +550,7 @@
config BOARD_GOOGLE_TRULO
select BOARD_GOOGLE_BASEBOARD_TRULO
+ select SKIP_RAM_ID_STRAPS
select SOC_INTEL_TWINLAKE
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SOC_INTEL_TCSS_USE_PDC_PMC_USBC_MUX_CONFIGURATION
@@ -1000,4 +1001,16 @@
int
default 33
+config SKIP_RAM_ID_STRAPS
+ bool
+ default n
+ help
+ Enable this option if the board variant does not rely on MEM Strap GPIOs to determine the SPD ID.
+
+ This is typically the case when the DRAM part is fixed (only one type is used).
+ In such board designs, enabling this option will bypass the reading of MEM Strap GPIOs
+ and instead use a static SPD ID number.
+
+ If unsure, leave this option disabled.
+
endif # BOARD_GOOGLE_BRYA_COMMON
diff --git a/src/mainboard/google/brya/variants/trulo/memory.c b/src/mainboard/google/brya/variants/trulo/memory.c
index a6f16db..062854e 100644
--- a/src/mainboard/google/brya/variants/trulo/memory.c
+++ b/src/mainboard/google/brya/variants/trulo/memory.c
@@ -76,6 +76,9 @@
int variant_memory_sku(void)
{
+ if (CONFIG(SKIP_RAM_ID_STRAPS))
+ return 0; /* SPD ID: 0 - MT62F512M32D2DR-031 WT:B */
+
/*
* Memory configuration board straps
* GPIO_MEM_CONFIG_0 GPP_E2
--
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Gerrit-MessageType: merged
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I1acb4680a143611c55f4fa6e032fde38c62af054
Gerrit-Change-Number: 83543
Gerrit-PatchSet: 3
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com>
Gerrit-Reviewer: Eric Lai <ericllai(a)google.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>