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Change subject: Makefile.inc: Decrease minimal pagesize from 4 kB to 1 kB
......................................................................
Patch Set 2: Code-Review+2
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Change subject: util/inteltool: Add more Westmere/Ironlake device IDs
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60215/comment/e52f3431_ce86b4dc :
PS2, Line 8:
> CB:45562 explains where the IDs come from
Done
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Hello Felix Held, Felix Singer, Michael Niewöhner, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/60215?usp=email
to look at the new patch set (#3).
Change subject: util/inteltool: Add more Westmere/Ironlake device IDs
......................................................................
util/inteltool: Add more Westmere/Ironlake device IDs
The host bridge PCI device ID can be changed by the firmware. There
is no documentation about it, though. There's 'official' IDs, which
appear in spec updates and Windows drivers, and 'mysterious' IDs,
which Intel doesn't want OSes to know about and thus are not listed.
For the sake of completeness, add the PCI device IDs for Clarkdale.
Though coreboot only supports Arrandale, both of them are Ironlake.
It is possible that the Management Engine handles changing the PCI
device ID, which would not happen when using a broken ME firmware.
Change-Id: I85a48fcf0e0e62f42fe147a5d4e2d557b2143e5b
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
M util/inteltool/inteltool.c
M util/inteltool/inteltool.h
M util/inteltool/memory.c
M util/inteltool/pcie.c
4 files changed, 17 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/60215/3
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Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/libgfxinit/+/44786 )
Change subject: gma registers: Allow to specify an offset for display registers
......................................................................
gma registers: Allow to specify an offset for display registers
Certain platforms, namely Bay Trail and Braswell, have the display
engine registers at an offset relative to GTTMMADR base. Apart from
that, the registers are rather similar to the ones on GMCH platforms.
Allow platforms to specify at which offset within GTTMM the display
registers are located. Use zero for all currently-supported platforms.
Change-Id: Id5497a23776e9aa9e2fd5ca0479030cb8e55712f
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
M common/hw-gfx-gma-config.ads.template
M common/hw-gfx-gma-registers.adb
2 files changed, 3 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/86/44786/1
diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template
index 241fe8e..ecbd908 100644
--- a/common/hw-gfx-gma-config.ads.template
+++ b/common/hw-gfx-gma-config.ads.template
@@ -55,6 +55,8 @@
Default_MMIO_Base : constant := <<DEFAULT_MMIO_BASE>>;
+ Display_Base_Offset : constant := 0;
+
LVDS_Dual_Threshold : constant := 95_000_000;
Ignore_Presence_Straps : constant Boolean := <<IGNORE_STRAPS>>;
diff --git a/common/hw-gfx-gma-registers.adb b/common/hw-gfx-gma-registers.adb
index 3f0d7ae..5ea134a 100644
--- a/common/hw-gfx-gma-registers.adb
+++ b/common/hw-gfx-gma-registers.adb
@@ -211,7 +211,7 @@
SPARK_Mode => Off
is
begin
- return Reg'Enum_Rep;
+ return Reg'Enum_Rep + Config.Display_Base_Offset;
end Index;
end Rep;
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Change subject: mb/google/corsola: Add new board variant Skitty
......................................................................
Patch Set 8: Code-Review+1
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Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/libgfxinit/+/81854?usp=email )
Change subject: gfxtest: Fix out-of-order components, permanently
......................................................................
gfxtest: Fix out-of-order components, permanently
The `Pixel_Type` record uses a different order for its components, as
the hardware expects the data bytes in BGRA order but most people are
used to RGBA order for color components. However, this approach makes
the compiler complain:
warning: component clause out of order with respect to declaration [-gnatw_r]
This prevents building gfxtest since the warning gets promoted to an
error. While the issue is easy to work around (use BGRA order in the
declaration), *having* to work around this problem is most certainly
not ideal.
Introduce the `From_RGB` function, which maps 3 or 4 RGB(A) bytes to
a `Pixel_Type` record. Alpha is optional for convenience, as most of
the pixel handling uses fully opaque colors anyway.
Use this new function to replace positional aggregate initialization
to preserve colors (red is red, blue is blue). Omitting `255` alphas
makes up for the (slightly) increased verbosity of the code.
TEST=Run this and make sure all builds pass:
for f in configs/*
do
make distclean
make DEBUG=1 cnf=$f gfx_test -j$(nproc)
done
Change-Id: I77dbdcd6c235e411585585779c31777adcef57d0
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
M gfxtest/hw-gfx-gma-gfx_test.adb
1 file changed, 13 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/54/81854/1
diff --git a/gfxtest/hw-gfx-gma-gfx_test.adb b/gfxtest/hw-gfx-gma-gfx_test.adb
index a7579a0..a70721b 100644
--- a/gfxtest/hw-gfx-gma-gfx_test.adb
+++ b/gfxtest/hw-gfx-gma-gfx_test.adb
@@ -51,9 +51,9 @@
end Restore_GTT;
type Pixel_Type is record
- Red : Byte;
- Green : Byte;
Blue : Byte;
+ Green : Byte;
+ Red : Byte;
Alpha : Byte;
end record;
@@ -64,11 +64,14 @@
Alpha at 3 range 0 .. 7;
end record;
- White : constant Pixel_Type := (255, 255, 255, 255);
- Black : constant Pixel_Type := ( 0, 0, 0, 255);
- Red : constant Pixel_Type := (255, 0, 0, 255);
- Green : constant Pixel_Type := ( 0, 255, 0, 255);
- Blue : constant Pixel_Type := ( 0, 0, 255, 255);
+ function From_RGB (R, G, B : Byte; A : Byte := 255) return Pixel_Type is
+ (Red => R, Green => G, Blue => B, Alpha => A);
+
+ White : constant Pixel_Type := From_RGB (255, 255, 255);
+ Black : constant Pixel_Type := From_RGB ( 0, 0, 0);
+ Red : constant Pixel_Type := From_RGB (255, 0, 0);
+ Green : constant Pixel_Type := From_RGB ( 0, 255, 0);
+ Blue : constant Pixel_Type := From_RGB ( 0, 0, 255);
function Pixel_To_Word (P : Pixel_Type) return Word32
with
@@ -168,9 +171,9 @@
begin
return
(case Pipe is
- when GMA.Primary => (Map (Xn, Yn), Map (Xp, Yn), Map (Xp, Yp), 255),
- when GMA.Secondary => (Map (Xn, Yp), Map (Xn, Yn), Map (Xp, Yn), 255),
- when GMA.Tertiary => (Map (Xp, Yp), Map (Xn, Yp), Map (Xn, Yn), 255));
+ when GMA.Primary => From_RGB (Map (Xn, Yn), Map (Xp, Yn), Map (Xp, Yp)),
+ when GMA.Secondary => From_RGB (Map (Xn, Yp), Map (Xn, Yn), Map (Xp, Yn)),
+ when GMA.Tertiary => From_RGB (Map (Xp, Yp), Map (Xn, Yp), Map (Xn, Yn)));
end Fill;
procedure Test_Screen
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