coreboot-gerrit March 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: arch/riscv: minimal changes to get sifive unmatched with non-SMP
by ron minnich (Code Review) 21 Mar '24

21 Mar '24

Attention is currently required from: Philipp Hug. ron minnich has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81308?usp=email ) Change subject: arch/riscv: minimal changes to get sifive unmatched with non-SMP ...................................................................... Patch Set 4: (1 comment) File src/arch/riscv/payload.c: https://review.coreboot.org/c/coreboot/+/81308/comment/eff8c320_243b2042 : PS4, Line 91: write_csr(mie, 0); is this a mistake? Hug, any comment here? -- To view, visit https://review.coreboot.org/c/coreboot/+/81308?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2ac227e5b2833758506c8d0a8f6ac743ee226d58 Gerrit-Change-Number: 81308 Gerrit-PatchSet: 4 Gerrit-Owner: ron minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Comment-Date: Thu, 21 Mar 2024 20:19:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: drivers/intel/fsp2_0: Support FSP-T in long mode
by Jérémy Compostella (Code Review) 21 Mar '24

21 Mar '24

Attention is currently required from: Andrey Petrov, Patrick Rudolph, Ronak Kanabar. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81281?usp=email ) Change subject: drivers/intel/fsp2_0: Support FSP-T in long mode ...................................................................... Patch Set 2: (2 comments) File src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S: https://review.coreboot.org/c/coreboot/+/81281/comment/761bc367_8c931cbc : PS2, Line 7: #include <cpu/x86/64bit/entry64.inc> Alphabetical order ? https://review.coreboot.org/c/coreboot/+/81281/comment/fd45933b_3f0faa7e : PS2, Line 95: CONFIG_ARCH_X86_64_PGTBL_LOC Make sure it is aligned with https://review.coreboot.org/c/coreboot/+/80337 depending on the patches merge order. -- To view, visit https://review.coreboot.org/c/coreboot/+/81281?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id6b9780b06b4bfbb952e32091ffbf3d0014f2090 Gerrit-Change-Number: 81281 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Thu, 21 Mar 2024 20:15:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/intel/xeon_sp/spr: Enable x86_64 support
by Jérémy Compostella (Code Review) 21 Mar '24

21 Mar '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Ray Ni, Tim Chu. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81280?usp=email ) Change subject: soc/intel/xeon_sp/spr: Enable x86_64 support ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81280?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2c5ed0339a9c2e9b088b16dbb4c19df98e796d65 Gerrit-Change-Number: 81280 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Ray Ni <ray.ni(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Ray Ni <ray.ni(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Thu, 21 Mar 2024 20:11:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: cpu/x86: Link page tables in stage if possible
by Jérémy Compostella (Code Review) 21 Mar '24

21 Mar '24

Attention is currently required from: Arthur Heymans, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Patrick Rudolph. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80337?usp=email ) Change subject: cpu/x86: Link page tables in stage if possible ...................................................................... Patch Set 13: (9 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/80337/comment/3773cb17_b24a76da : PS13, Line 9: 32 to 64 32-bits to 64-bits https://review.coreboot.org/c/coreboot/+/80337/comment/46c7a653_c0cbcd98 : PS13, Line 9: back and forward "backward and forward" or "back and forth" https://review.coreboot.org/c/coreboot/+/80337/comment/880d9488_72e3021e : PS13, Line 10: 32bit 32-bits https://review.coreboot.org/c/coreboot/+/80337/comment/f42b6f06_5ba2f66b : PS13, Line 10: tables table https://review.coreboot.org/c/coreboot/+/80337/comment/b2d43d87_6030a74e : PS13, Line 14: cbfs CBFS https://review.coreboot.org/c/coreboot/+/80337/comment/00fee421_180d06fe : PS13, Line 22: used using https://review.coreboot.org/c/coreboot/+/80337/comment/950c871a_7d611817 : PS13, Line 26: cbfs CBFS https://review.coreboot.org/c/coreboot/+/80337/comment/8bbd1313_e93e1bfa : PS13, Line 28: TESTED TEST: <...> File src/cpu/x86/64bit/pt.S: https://review.coreboot.org/c/coreboot/+/80337/comment/81401ba9_72063394 : PS13, Line 21: .align 4096 wouldn't it make sense to change the alignment depending on the configuration to prevent waste of space when page tables are in CBFS ? -- To view, visit https://review.coreboot.org/c/coreboot/+/80337?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ied54b66b930187cba5fbc578a81ed5859a616562 Gerrit-Change-Number: 80337 Gerrit-PatchSet: 13 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 21 Mar 2024 20:09:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[main]: [Squash]: Add ACPI BDAT support
by Jérémy Compostella (Code Review) 21 Mar '24

21 Mar '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Chen, Gang C, Cliff Huang, Gaggery Tsai, Jamie Ryu, Kane Chen, Karthik Ramasubramanian, Krishna P Bhat D, Lance Zhao, Pratikkumar V Prajapati, Ravishankar Sarawadi, Ronak Kanabar, Subrata Banik, Tim Wawrzynczak, V Sowmya, Wonkyu Kim. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77255?usp=email ) Change subject: [Squash]: Add ACPI BDAT support ...................................................................... Patch Set 15: (15 comments) File src/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/77255/comment/e5be25d6_65bcd6d0 : PS15, Line 1106: unsigned long long IMO, `uint64_t` would keep the line shorter while also making the understanding of this line slightly more straightforward. File src/soc/intel/common/block/acpi/acpi_bdat.c: https://review.coreboot.org/c/coreboot/+/77255/comment/da16c5cf_25f61254 : PS15, Line 12: #define INTEL_FSP_BDAT_SCHEMA_LIST_HOB_GUID \ What about ? ``` static const efi_guid_t BDAT_SCHEMA_LIST_HOB_GUID = { ... }; ``` https://review.coreboot.org/c/coreboot/+/77255/comment/2fde28b2_30344b67 : PS15, Line 26: if (guid != NULL) { that test seems unnecessary for a static function called with a non-NULL parameter according the code below. https://review.coreboot.org/c/coreboot/+/77255/comment/5ea7c9ca_357b25f3 : PS15, Line 62: EFI_GUID *guid; Please use the <efi/efi_datatypes.h> version of the UEFI types. https://review.coreboot.org/c/coreboot/+/77255/comment/576bf960_ac795803 : PS15, Line 63: const uint32_t *schema[MAX_SCHEMA_LIST_LENGTH] = {NULL}; : uint32_t schema_size[MAX_SCHEMA_LIST_LENGTH]; This intermediate data structure could be simplified as a structure: ``` const struct { uint32_t *address; uint32_t size; } schema[MAX_SCHEMA_LIST_LENGTH]; ``` It should make your code less cumbersome IMO https://review.coreboot.org/c/coreboot/+/77255/comment/e23e9ae2_7ccf94b3 : PS15, Line 67: const uint8_t bdat_header_sign[] = {'B', 'D', 'A', 'T', 'H', 'E', 'A', 'D'}; I would make is a static variable of the C module instead of a stack variable. ``` static const uint8_t BDAT_SIGNATURE[] = {'B', 'D', 'A', 'T', 'H', 'E', 'A', 'D'}; ``` https://review.coreboot.org/c/coreboot/+/77255/comment/053687c3_1d525d02 : PS15, Line 74: printk(BIOS_ERR, "No BDAT data exists.\n"); `No BDAT data found.\n` ? https://review.coreboot.org/c/coreboot/+/77255/comment/ff2fa4ba_11696f44 : PS15, Line 78: (void *) Is that case really necessary ? https://review.coreboot.org/c/coreboot/+/77255/comment/0bebf937_ec9a889d : PS15, Line 86: if (guid != NULL) { How can `guid` be `NULL` ? https://review.coreboot.org/c/coreboot/+/77255/comment/b8238e4c_06b2c328 : PS15, Line 88: uint8_t *p = (uint8_t *)guid; This intermediate variable seems unnecessary. https://review.coreboot.org/c/coreboot/+/77255/comment/b6ae903a_1034e495 : PS15, Line 92: (void *) schema[schema_count], hob_size); weird indentation. https://review.coreboot.org/c/coreboot/+/77255/comment/e06b9cc8_02972f30 : PS15, Line 155: ) b Coding style: Usually there is no space between the closing parenthesis of the cast and the name of the variable. https://review.coreboot.org/c/coreboot/+/77255/comment/4bef3325_852989b4 : PS15, Line 162: &bdat_header->bios_data_sig[0] `bdat_header->bios_data_sig` ? https://review.coreboot.org/c/coreboot/+/77255/comment/e60220ca_89c51733 : PS15, Line 174: schema_data unnecessary intermediate variable. File src/soc/intel/common/block/include/intelblocks/acpi_bdat.h: https://review.coreboot.org/c/coreboot/+/77255/comment/ae5ebae7_0864278c : PS15, Line 69: that's quite a log of tabs. A single space would do it. -- To view, visit https://review.coreboot.org/c/coreboot/+/77255?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5eb57f65ef5f24458f09587b7c7694156f2ed1ce Gerrit-Change-Number: 77255 Gerrit-PatchSet: 15 Gerrit-Owner: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-Attention: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 21 Mar 2024 20:00:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/intel/apollolake: Create IBB, IBBL and OBB
by Arthur Heymans (Code Review) 21 Mar '24

21 Mar '24

Attention is currently required from: Andrey Petrov, Angel Pons, Michał Żygowski, Sean Rhodes. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/65680?usp=email ) Change subject: soc/intel/apollolake: Create IBB, IBBL and OBB ...................................................................... Patch Set 27: (1 comment) File src/soc/intel/apollolake/Makefile.mk: https://review.coreboot.org/c/coreboot/+/65680/comment/10aa0232_2617151a : PS27, Line 212: dd if=$(objcbfs)/$(call strip_quotes,$(CONFIG_IBBM_ROM_COMPONENT)) \ : of=$@ skip=96 bs=1 count=$(call _toint,$(CONFIG_IBBM_ROM_SIZE)) Is this some sort hacky skipping of the ELF header? I suggest using objcopy to create a binary that you can use. -- To view, visit https://review.coreboot.org/c/coreboot/+/65680?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0deebf04f22f3017ee0c13bf1ca7f6dcc0d458b5 Gerrit-Change-Number: 65680 Gerrit-PatchSet: 27 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Thu, 21 Mar 2024 19:51:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/intel/mtlrvp: Add Intel Touch driver for controller 0 and 1
by Kyoung Il Kim (Code Review) 21 Mar '24

21 Mar '24

Attention is currently required from: Bora Guvendik, Cliff Huang. Kyoung Il Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81335?usp=email ) Change subject: mb/intel/mtlrvp: Add Intel Touch driver for controller 0 and 1 ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/81335?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5433693973a21e90886c9075a23aaac84b2f642d Gerrit-Change-Number: 81335 Gerrit-PatchSet: 3 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Kyoung Il Kim <kyoung.il.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Comment-Date: Thu, 21 Mar 2024 19:47:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/rex: Add Intel Touch for controller 1 for Rex
by Kyoung Il Kim (Code Review) 21 Mar '24

21 Mar '24

Attention is currently required from: Cliff Huang, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jingyuan Liang, Kapil Porwal, Subrata Banik, Tarun. Kyoung Il Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81333?usp=email ) Change subject: mb/google/rex: Add Intel Touch for controller 1 for Rex ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/81333?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id89b5b46d67b90491410d3d08c1a3ae9549b4da5 Gerrit-Change-Number: 81333 Gerrit-PatchSet: 1 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kyoung Il Kim <kyoung.il.kim(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Thu, 21 Mar 2024 19:45:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/meteorlake: Update Touch Controller UDP params
by Kyoung Il Kim (Code Review) 21 Mar '24

21 Mar '24

Attention is currently required from: Cliff Huang, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jingyuan Liang, Kapil Porwal, Subrata Banik, Tarun. Kyoung Il Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81332?usp=email ) Change subject: soc/intel/meteorlake: Update Touch Controller UDP params ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/81332?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I19edbcad705e889166d7d340b2caa74ab3bf15a1 Gerrit-Change-Number: 81332 Gerrit-PatchSet: 1 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kyoung Il Kim <kyoung.il.kim(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Thu, 21 Mar 2024 19:44:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[main]: drivers/intel/touch: Add driver for Intel Touch Controller and Devices
by Kyoung Il Kim (Code Review) 21 Mar '24

21 Mar '24

Attention is currently required from: Cliff Huang, Eran Mitrani, Jingyuan Liang. Kyoung Il Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81331?usp=email ) Change subject: drivers/intel/touch: Add driver for Intel Touch Controller and Devices ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/81331?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I52dfcd187c92141cb8fc47f4143b90d243439d4e Gerrit-Change-Number: 81331 Gerrit-PatchSet: 1 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Reviewer: Kyoung Il Kim <kyoung.il.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Comment-Date: Thu, 21 Mar 2024 19:43:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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