coreboot-gerrit February 2024

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[S] Change in coreboot[main]: treewide: Remove unused CHIPs
by Felix Singer (Code Review) 20 Feb '24

20 Feb '24

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/72600?usp=email ) Change subject: treewide: Remove unused CHIPs ...................................................................... treewide: Remove unused CHIPs No devicetree uses these anymore. Change-Id: Ia65a0a56a6668a13761bad35f6a44ed8f6a35a78 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72600 Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/cpu/amd/pi/00730F01/Makefile.mk D src/cpu/amd/pi/00730F01/chip_name.c M src/cpu/intel/model_1067x/model_1067x_init.c M src/cpu/intel/slot_1/Makefile.mk D src/cpu/intel/slot_1/slot_1.c 5 files changed, 0 insertions(+), 20 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/src/cpu/amd/pi/00730F01/Makefile.mk b/src/cpu/amd/pi/00730F01/Makefile.mk index ae5a20b..9b3f015 100644 --- a/src/cpu/amd/pi/00730F01/Makefile.mk +++ b/src/cpu/amd/pi/00730F01/Makefile.mk @@ -2,7 +2,6 @@ romstage-y += cpu_io_init.c -ramstage-y += chip_name.c ramstage-y += cpu_io_init.c ramstage-y += model_16_init.c ramstage-y += update_microcode.c diff --git a/src/cpu/amd/pi/00730F01/chip_name.c b/src/cpu/amd/pi/00730F01/chip_name.c deleted file mode 100644 index 592fcc0..0000000 --- a/src/cpu/amd/pi/00730F01/chip_name.c +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/device.h> - -struct chip_operations cpu_amd_pi_00730F01_ops = { - .name = "AMD CPU Family 16h Model 30h-3Fh", -}; diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c index c2019ab..d051e89 100644 --- a/src/cpu/intel/model_1067x/model_1067x_init.c +++ b/src/cpu/intel/model_1067x/model_1067x_init.c @@ -275,7 +275,3 @@ .ops = &cpu_dev_ops, .id_table = cpu_table, }; - -struct chip_operations cpu_intel_model_1067x_ops = { - .name = "Intel Penryn CPU", -}; diff --git a/src/cpu/intel/slot_1/Makefile.mk b/src/cpu/intel/slot_1/Makefile.mk index 856ecf6..0f1ba8d 100644 --- a/src/cpu/intel/slot_1/Makefile.mk +++ b/src/cpu/intel/slot_1/Makefile.mk @@ -1,6 +1,5 @@ ## SPDX-License-Identifier: GPL-2.0-or-later -ramstage-y += slot_1.c ramstage-y += l2_cache.c subdirs-y += ../model_6xx subdirs-y += ../model_65x diff --git a/src/cpu/intel/slot_1/slot_1.c b/src/cpu/intel/slot_1/slot_1.c deleted file mode 100644 index ed8e88c..0000000 --- a/src/cpu/intel/slot_1/slot_1.c +++ /dev/null @@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <device/device.h> - -struct chip_operations cpu_intel_slot_1_ops = { - .name = "Slot 1 CPU", -}; -- To view, visit https://review.coreboot.org/c/coreboot/+/72600?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia65a0a56a6668a13761bad35f6a44ed8f6a35a78 Gerrit-Change-Number: 72600 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: treewide: Remove unused CHIPs
by Felix Singer (Code Review) 20 Feb '24

20 Feb '24

Attention is currently required from: Arthur Heymans, Martin L Roth, Maximilian Brune. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72600?usp=email ) Change subject: treewide: Remove unused CHIPs ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/72600?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia65a0a56a6668a13761bad35f6a44ed8f6a35a78 Gerrit-Change-Number: 72600 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 20 Feb 2024 11:00:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: arch/arm/armv7/Makefile.inc: Add more finegrained ld-ccopts
by Arthur Heymans (Code Review) 20 Feb '24

20 Feb '24

Attention is currently required from: Arthur Heymans, Julius Werner, Martin L Roth. Hello Felix Singer, Julius Werner, Martin L Roth, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75031?usp=email to look at the new patch set (#10). The following approvals got outdated and were removed: Code-Review+2 by Julius Werner, Verified+1 by build bot (Jenkins) Change subject: arch/arm/armv7/Makefile.inc: Add more finegrained ld-ccopts ...................................................................... arch/arm/armv7/Makefile.inc: Add more finegrained ld-ccopts Add linker targets only to stages when ARCH_#stage_ARMV7 is set. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: I4340681e30059d6f18a49a49937668cd3dd39ce1 --- M src/arch/arm/armv7/Makefile.mk 1 file changed, 15 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/75031/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/75031?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4340681e30059d6f18a49a49937668cd3dd39ce1 Gerrit-Change-Number: 75031 Gerrit-PatchSet: 10 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: security/tpm: Handle S3 resume logging
by Arthur Heymans (Code Review) 20 Feb '24

20 Feb '24

Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/74138?usp=email ) Change subject: security/tpm: Handle S3 resume logging ...................................................................... Abandoned wrong -- To view, visit https://review.coreboot.org/c/coreboot/+/74138?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7049bf23fea876cdd19103af6e6fd3d5a20ed114 Gerrit-Change-Number: 74138 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Sean Rhodes <sean(a)starlabs.systems> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: abandon

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[XS] Change in coreboot[main]: mb/intel/adlrvp: Include ADL-N ID 5
by Kapil Porwal (Code Review) 20 Feb '24

20 Feb '24

Attention is currently required from: Nick Vaccaro, Sean Rhodes, Subrata Banik. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80166?usp=email ) Change subject: mb/intel/adlrvp: Include ADL-N ID 5 ...................................................................... Patch Set 8: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/80166/comment/b41f5a90_ef7733f5 : PS8, Line 7: mb/intel/adlrvp Replace it with `soc/intel/alderlake`. Looks like the mainboard changes are already merged as part of previous CL. -- To view, visit https://review.coreboot.org/c/coreboot/+/80166?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7b9fc64ccf8e2401dcd55607e8f09b348efb3182 Gerrit-Change-Number: 80166 Gerrit-PatchSet: 8 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 20 Feb 2024 10:48:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: payloads/Kconfig: Don't show FIT payload option on x86
by Arthur Heymans (Code Review) 20 Feb '24

20 Feb '24

Attention is currently required from: Paul Menzel. Hello Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69792?usp=email to look at the new patch set (#2). Change subject: payloads/Kconfig: Don't show FIT payload option on x86 ...................................................................... payloads/Kconfig: Don't show FIT payload option on x86 On AMD systems where the verstage selects ARCH_ARM the bogus option to add a FIT payload is show. Therefore be more specific about the arch of the stage loading the payload (ramstage). Change-Id: I7afc3b94c5ab8044af0920c87cc8d190467c2a88 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M payloads/Kconfig 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/69792/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69792?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7afc3b94c5ab8044af0920c87cc8d190467c2a88 Gerrit-Change-Number: 69792 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: payloads/Kconfig: Don't show FIT payload option on x86
by Arthur Heymans (Code Review) 20 Feb '24

20 Feb '24

Attention is currently required from: Paul Menzel. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69792?usp=email ) Change subject: payloads/Kconfig: Don't show FIT payload option on x86 ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/69792/comment/bd27c1e2_671fa528 : PS1, Line 10: will be show > is shown Done -- To view, visit https://review.coreboot.org/c/coreboot/+/69792?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7afc3b94c5ab8044af0920c87cc8d190467c2a88 Gerrit-Change-Number: 69792 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 20 Feb 2024 10:47:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: treewide: Remove unused CHIPs
by Arthur Heymans (Code Review) 20 Feb '24

20 Feb '24

Attention is currently required from: Arthur Heymans, Martin L Roth, Maximilian Brune. Hello Angel Pons, Felix Singer, Martin L Roth, Maximilian Brune, Nico Huber, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72600?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+2 by Martin L Roth, Code-Review+2 by Maximilian Brune Change subject: treewide: Remove unused CHIPs ...................................................................... treewide: Remove unused CHIPs No devicetree uses these anymore. Change-Id: Ia65a0a56a6668a13761bad35f6a44ed8f6a35a78 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/amd/pi/00730F01/Makefile.mk D src/cpu/amd/pi/00730F01/chip_name.c M src/cpu/intel/model_1067x/model_1067x_init.c M src/cpu/intel/slot_1/Makefile.mk D src/cpu/intel/slot_1/slot_1.c 5 files changed, 0 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/72600/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/72600?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia65a0a56a6668a13761bad35f6a44ed8f6a35a78 Gerrit-Change-Number: 72600 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: arch/x86/*.ld: Use MEMORY command to verify sections
by Arthur Heymans (Code Review) 20 Feb '24

20 Feb '24

Attention is currently required from: Arthur Heymans. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/71871?usp=email to look at the new patch set (#5). Change subject: arch/x86/*.ld: Use MEMORY command to verify sections ...................................................................... arch/x86/*.ld: Use MEMORY command to verify sections Using the MEMORY command is easier to read than manual assertions. Change-Id: Icface3a286fe01b28e103e0ca7233e071329c9f0 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/x86/bootblock.ld M src/arch/x86/car.ld M src/arch/x86/memlayout.ld M src/soc/example/min86/Kconfig 4 files changed, 30 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/71871/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/71871?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icface3a286fe01b28e103e0ca7233e071329c9f0 Gerrit-Change-Number: 71871 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: util/crossgcc: Update LLVM from 16.0.6 to 17.0.6
by Felix Singer (Code Review) 20 Feb '24

20 Feb '24

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78884?usp=email ) Change subject: util/crossgcc: Update LLVM from 16.0.6 to 17.0.6 ...................................................................... util/crossgcc: Update LLVM from 16.0.6 to 17.0.6 Change-Id: Ifed410f4b7fdc358535f01850328c642d19ff1f6 Signed-off-by: Felix Singer <felixsinger(a)posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78884 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> --- M util/crossgcc/buildgcc D util/crossgcc/sum/clang-16.0.6.src.tar.xz.cksum A util/crossgcc/sum/clang-17.0.6.src.tar.xz.cksum D util/crossgcc/sum/clang-tools-extra-16.0.6.src.tar.xz.cksum A util/crossgcc/sum/clang-tools-extra-17.0.6.src.tar.xz.cksum D util/crossgcc/sum/cmake-16.0.6.src.tar.xz.cksum A util/crossgcc/sum/cmake-17.0.6.src.tar.xz.cksum D util/crossgcc/sum/compiler-rt-16.0.6.src.tar.xz.cksum A util/crossgcc/sum/compiler-rt-17.0.6.src.tar.xz.cksum D util/crossgcc/sum/llvm-16.0.6.src.tar.xz.cksum A util/crossgcc/sum/llvm-17.0.6.src.tar.xz.cksum 11 files changed, 6 insertions(+), 6 deletions(-) Approvals: Felix Singer: Looks good to me, approved build bot (Jenkins): Verified diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 10c9969..e90117c 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -42,7 +42,7 @@ BINUTILS_VERSION=2.42 IASL_VERSION="R06_28_23" # CLANG version number -CLANG_VERSION=16.0.6 +CLANG_VERSION=17.0.6 CMAKE_VERSION=3.27.7 NASM_VERSION=2.16.01 diff --git a/util/crossgcc/sum/clang-16.0.6.src.tar.xz.cksum b/util/crossgcc/sum/clang-16.0.6.src.tar.xz.cksum deleted file mode 100644 index 1a4e21e..0000000 --- a/util/crossgcc/sum/clang-16.0.6.src.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -f005e3b6d41cf92c083d2a16960aaeb1a6e3c76c tarballs/clang-16.0.6.src.tar.xz diff --git a/util/crossgcc/sum/clang-17.0.6.src.tar.xz.cksum b/util/crossgcc/sum/clang-17.0.6.src.tar.xz.cksum new file mode 100644 index 0000000..0b3ea1e --- /dev/null +++ b/util/crossgcc/sum/clang-17.0.6.src.tar.xz.cksum @@ -0,0 +1 @@ +2822ff10a016df1fffdeb296f753e9c5fce764ee tarballs/clang-17.0.6.src.tar.xz diff --git a/util/crossgcc/sum/clang-tools-extra-16.0.6.src.tar.xz.cksum b/util/crossgcc/sum/clang-tools-extra-16.0.6.src.tar.xz.cksum deleted file mode 100644 index 939dda2..0000000 --- a/util/crossgcc/sum/clang-tools-extra-16.0.6.src.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -41c06d541cfcc126ddc344e7f162148f2ecf0461 tarballs/clang-tools-extra-16.0.6.src.tar.xz diff --git a/util/crossgcc/sum/clang-tools-extra-17.0.6.src.tar.xz.cksum b/util/crossgcc/sum/clang-tools-extra-17.0.6.src.tar.xz.cksum new file mode 100644 index 0000000..bd32393 --- /dev/null +++ b/util/crossgcc/sum/clang-tools-extra-17.0.6.src.tar.xz.cksum @@ -0,0 +1 @@ +1ec17cc98c397d6b4d30f57f14646fa085c9ccce tarballs/clang-tools-extra-17.0.6.src.tar.xz diff --git a/util/crossgcc/sum/cmake-16.0.6.src.tar.xz.cksum b/util/crossgcc/sum/cmake-16.0.6.src.tar.xz.cksum deleted file mode 100644 index a7aeb57..0000000 --- a/util/crossgcc/sum/cmake-16.0.6.src.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -0de534cfef38697e115c3ae80634765f05e78e5b tarballs/cmake-16.0.6.src.tar.xz diff --git a/util/crossgcc/sum/cmake-17.0.6.src.tar.xz.cksum b/util/crossgcc/sum/cmake-17.0.6.src.tar.xz.cksum new file mode 100644 index 0000000..03d7bc7 --- /dev/null +++ b/util/crossgcc/sum/cmake-17.0.6.src.tar.xz.cksum @@ -0,0 +1 @@ +4b397344260c934e687be7efa0f8456a9dd46f44 tarballs/cmake-17.0.6.src.tar.xz diff --git a/util/crossgcc/sum/compiler-rt-16.0.6.src.tar.xz.cksum b/util/crossgcc/sum/compiler-rt-16.0.6.src.tar.xz.cksum deleted file mode 100644 index d79eab8..0000000 --- a/util/crossgcc/sum/compiler-rt-16.0.6.src.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -28ddc89aac54cbfa6d0a0cd07a14bbd3f3a01d5f tarballs/compiler-rt-16.0.6.src.tar.xz diff --git a/util/crossgcc/sum/compiler-rt-17.0.6.src.tar.xz.cksum b/util/crossgcc/sum/compiler-rt-17.0.6.src.tar.xz.cksum new file mode 100644 index 0000000..e644586 --- /dev/null +++ b/util/crossgcc/sum/compiler-rt-17.0.6.src.tar.xz.cksum @@ -0,0 +1 @@ +b0f7f43251829aafd07a3b09a9c3e4987cfa9204 tarballs/compiler-rt-17.0.6.src.tar.xz diff --git a/util/crossgcc/sum/llvm-16.0.6.src.tar.xz.cksum b/util/crossgcc/sum/llvm-16.0.6.src.tar.xz.cksum deleted file mode 100644 index f8185f1..0000000 --- a/util/crossgcc/sum/llvm-16.0.6.src.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -072d2fb4b10f95d06189de00eb7f7e9b35c54e9a tarballs/llvm-16.0.6.src.tar.xz diff --git a/util/crossgcc/sum/llvm-17.0.6.src.tar.xz.cksum b/util/crossgcc/sum/llvm-17.0.6.src.tar.xz.cksum new file mode 100644 index 0000000..0164cba --- /dev/null +++ b/util/crossgcc/sum/llvm-17.0.6.src.tar.xz.cksum @@ -0,0 +1 @@ +860a3605f08a0a56a8de4e073e26a259871623a6 tarballs/llvm-17.0.6.src.tar.xz -- To view, visit https://review.coreboot.org/c/coreboot/+/78884?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifed410f4b7fdc358535f01850328c642d19ff1f6 Gerrit-Change-Number: 78884 Gerrit-PatchSet: 9 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: merged

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coreboot-gerrit February 2024