coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIC MT6363 driver
by Hope Wang (Code Review) 03 Dec '24

03 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Hope Wang has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85127?usp=email ) Change subject: soc/mediatek/mt8196: Add PMIC MT6363 driver ...................................................................... Patch Set 13: (13 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85127/comment/9d9ad395_d0f1908a?us… : PS7, Line 9: SOC > SoC Done https://review.coreboot.org/c/coreboot/+/85127/comment/4a82dcf1_462761da?us… : PS7, Line 12: MT6363_sdmadc > This isn't added in this patch. Done File src/soc/mediatek/common/include/soc/mt6363.h: https://review.coreboot.org/c/coreboot/+/85127/comment/c6b748ec_06b72ee0?us… : PS7, Line 11: a > Let's use all upper cases for consistency. Done https://review.coreboot.org/c/coreboot/+/85127/comment/c78e403c_4eca0165?us… : PS7, Line 28: 0x24e > Should this be sorted? Done https://review.coreboot.org/c/coreboot/+/85127/comment/0824904e_a843d2ef?us… : PS7, Line 115: #endif /* __SOC_MEDIATEK_MT6363_H__ */ > One blank line above. Done File src/soc/mediatek/common/mt6363.c: https://review.coreboot.org/c/coreboot/+/85127/comment/6c65a4f8_f6245599?us… : PS7, Line 11: MT6363_UDELAY_200US > MT6363_SET_DELAY_US […] Done https://review.coreboot.org/c/coreboot/+/85127/comment/a702d331_3a23e2e9?us… : PS7, Line 141: ) > remove Done https://review.coreboot.org/c/coreboot/+/85127/comment/e177dac0_16a8afc8?us… : PS7, Line 260: mt6363_sdmadc_init > This doesn't exist (yet). Remove it. Done File src/soc/mediatek/mt8196/mt6363.c: https://review.coreboot.org/c/coreboot/+/85127/comment/18291d43_750c2dbc?us… : PS7, Line 13: 0 > If `shift` is always 0, we can remove the field from the `pmic_setting` struct. Done https://review.coreboot.org/c/coreboot/+/85127/comment/b5ce8284_1137bce8?us… : PS7, Line 380: /* Suspend */ > Is this a TODO comment? Can we remove this in this patch, if not needed? Done https://review.coreboot.org/c/coreboot/+/85127/comment/ce1c580c_2d4d2399?us… : PS7, Line 390: /* We should disable unused modem power in a separate function and > Is this a TODO comment? If so, change it to `TODO: Disable unused ... […] Done https://review.coreboot.org/c/coreboot/+/85127/comment/1d5e2287_9dc9e060?us… : PS7, Line 390: /* > Wrong format. Done https://review.coreboot.org/c/coreboot/+/85127/comment/3fa71362_7bdb12db?us… : PS7, Line 396: pmic_lp_setting > Where is this called? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85127?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaf493b802522deba575d98c2ed69a93e94ce3d4e Gerrit-Change-Number: 85127 Gerrit-PatchSet: 13 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 03 Dec 2024 12:40:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIC mt6373 driver
by Jarried Lin (Code Review) 03 Dec '24

03 Dec '24

Attention is currently required from: Hope Wang, Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Hello Hope Wang, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85129?usp=email to look at the new patch set (#14). Change subject: soc/mediatek/mt8196: Add PMIC mt6373 driver ...................................................................... soc/mediatek/mt8196: Add PMIC mt6373 driver 1. add mt6373 driver in soc folder 2. add regulator api for SD power 3. add implement interface for vcn33_3 4. enable vcn33_3 & set vcn33_3 3.3v 5. add MT6373 LDO enable api TEST=build pass BUG=b:317009620 Change-Id: Icbcd1f5a22388093781fd92c31889dd55a0ed9a3 Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> --- A src/soc/mediatek/common/include/soc/mt6373.h A src/soc/mediatek/common/mt6373.c M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/mt6373.c 4 files changed, 718 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/85129/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/85129?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icbcd1f5a22388093781fd92c31889dd55a0ed9a3 Gerrit-Change-Number: 85129 Gerrit-PatchSet: 14 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIC MT6363 ADC driver
by Jarried Lin (Code Review) 03 Dec '24

03 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85128?usp=email to look at the new patch set (#14). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Add PMIC MT6363 ADC driver ...................................................................... soc/mediatek/mt8196: Add PMIC MT6363 ADC driver Add MT6363 AUXADC driver support. TEST=build pass BUG=b:317009620 Change-Id: Ice3c286cd207e445392d5f0126a07ce4f40dcf8a --- A src/soc/mediatek/common/include/soc/mt6363_sdmadc.h A src/soc/mediatek/common/mt6363_sdmadc.c M src/soc/mediatek/mt8196/Makefile.mk 3 files changed, 217 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/85128/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/85128?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ice3c286cd207e445392d5f0126a07ce4f40dcf8a Gerrit-Change-Number: 85128 Gerrit-PatchSet: 14 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIC mt6373 driver
by Jarried Lin (Code Review) 03 Dec '24

03 Dec '24

Attention is currently required from: Hope Wang, Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Hello Hope Wang, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85129?usp=email to look at the new patch set (#13). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Add PMIC mt6373 driver ...................................................................... soc/mediatek/mt8196: Add PMIC mt6373 driver 1. add mt6373 driver in soc folder 2. add regulator api for SD power 3. add implement interface for vcn33_3 4. enable vcn33_3 & set vcn33_3 3.3v 5. add MT6373 LDO enable api TEST=build pass BUG=b:317009620 Change-Id: Icbcd1f5a22388093781fd92c31889dd55a0ed9a3 Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> --- A src/soc/mediatek/common/include/soc/mt6373.h A src/soc/mediatek/common/mt6373.c M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/mt6373.c 4 files changed, 717 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/85129/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/85129?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icbcd1f5a22388093781fd92c31889dd55a0ed9a3 Gerrit-Change-Number: 85129 Gerrit-PatchSet: 13 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIC MT6363 ADC driver
by Jarried Lin (Code Review) 03 Dec '24

03 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85128?usp=email to look at the new patch set (#13). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Add PMIC MT6363 ADC driver ...................................................................... soc/mediatek/mt8196: Add PMIC MT6363 ADC driver Add MT6363 AUXADC driver support. TEST=build pass BUG=b:317009620 Change-Id: Ice3c286cd207e445392d5f0126a07ce4f40dcf8a --- A src/soc/mediatek/common/include/soc/mt6363_sdmadc.h A src/soc/mediatek/common/mt6363_sdmadc.c M src/soc/mediatek/mt8196/Makefile.mk 3 files changed, 218 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/85128/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/85128?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ice3c286cd207e445392d5f0126a07ce4f40dcf8a Gerrit-Change-Number: 85128 Gerrit-PatchSet: 13 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIC MT6363 driver
by Jarried Lin (Code Review) 03 Dec '24

03 Dec '24

Attention is currently required from: Hope Wang, Hung-Te Lin, Jarried Lin, Yidi Lin. Hello Hope Wang, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85127?usp=email to look at the new patch set (#13). Change subject: soc/mediatek/mt8196: Add PMIC MT6363 driver ...................................................................... soc/mediatek/mt8196: Add PMIC MT6363 driver 1. Add MT6363 driver in SoC folder 2. Add vtref18 set/get api 3. Add MT6363 LDO/BUCK enable api 4. Add pmif_arb for MT6363 TEST=build pass BUG=b:317009620 Change-Id: Iaf493b802522deba575d98c2ed69a93e94ce3d4e Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> --- A src/soc/mediatek/common/include/soc/mt6363.h A src/soc/mediatek/common/mt6363.c M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/mt6363.c 4 files changed, 767 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/85127/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/85127?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaf493b802522deba575d98c2ed69a93e94ce3d4e Gerrit-Change-Number: 85127 Gerrit-PatchSet: 13 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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[S] Change in coreboot[main]: Documentation/drivers/smmstorev2.md: describe capsule update API
by Michał Żygowski (Code Review) 03 Dec '24

03 Dec '24

Attention is currently required from: Arthur Heymans, Krystian Hebel, Martin L Roth, Patrick Rudolph, Paul Menzel, Sergii Dmytruk. Michał Żygowski has posted comments on this change by Sergii Dmytruk. ( https://review.coreboot.org/c/coreboot/+/83426?usp=email ) Change subject: Documentation/drivers/smmstorev2.md: describe capsule update API ...................................................................... Patch Set 13: (1 comment) File Documentation/drivers/smmstorev2.md: https://review.coreboot.org/c/coreboot/+/83426/comment/1ed7dc61_340168bf?us… : PS13, Line 213: Attempts to write the protected memory regions can lead to undesired. When unfinished sentence? -- To view, visit https://review.coreboot.org/c/coreboot/+/83426?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I94761d18be567e5302d1a836f09f0a7eecb4fb00 Gerrit-Change-Number: 83426 Gerrit-PatchSet: 13 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Tue, 03 Dec 2024 11:54:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: ec/google/chromeec: Add indexed IO support
by Jayvik Desai (Code Review) 03 Dec '24

03 Dec '24

Jayvik Desai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85449?usp=email ) Change subject: ec/google/chromeec: Add indexed IO support ...................................................................... ec/google/chromeec: Add indexed IO support Add support for indexed IO for ec communication, Indexed I/O allows memory access using a single I/O port base address usually called an index register and another port address called a data register. BUG=b:379224648 TEST= able to build nissa/yaviks Change-Id: I6c1aab3fc914eb5af2736a8ea3adf447040905e0 Signed-off-by: Jayvik Desai <jayvik(a)google.com> --- M src/ec/google/chromeec/Kconfig M src/ec/google/chromeec/ec_lpc.c 2 files changed, 28 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/85449/1 diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig index f0418ff..e7e56fa 100644 --- a/src/ec/google/chromeec/Kconfig +++ b/src/ec/google/chromeec/Kconfig @@ -60,6 +60,18 @@ this option simply enables the LPC EC code. The eSPI device still needs to correctly configure the bus transactions. +config EC_GOOGLE_CHROMEEC_INDEXED_IO + depends on EC_GOOGLE_CHROMEEC && ARCH_X86 + def_bool n + help + Google Chrome EC enable support for indexed I/O access. + + Indexed I/O allows devices with multiple memory locations to be + accessed using a single I/O port base address and an index register. + A separate data register, typically located at the address + immediately following the index register, is used for sending and + receiving data to the device. + config EC_GOOGLE_CHROMEEC_LPC depends on ARCH_X86 # Needs Plug-and-play. def_bool n diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c index 2a9eabb..1732abf 100644 --- a/src/ec/google/chromeec/ec_lpc.c +++ b/src/ec/google/chromeec/ec_lpc.c @@ -52,6 +52,18 @@ return byte; } +#if CONFIG(EC_GOOGLE_CHROMEEC_INDEXED_IO) +/* Read singe byte and return byte read using indexed IO*/ +static inline u8 read_byte_indexed_io(u16 port, u8 offset) +{ + u8 byte; + outb(offset, port); + port = port + 1; + byte = inb(port); + return byte; +} +#endif + /* * Write bytes to a given LPC-mapped address. * @@ -156,6 +168,10 @@ printk(BIOS_ERR, "Error reading memmap data.\n"); return -1; } +#elif CONFIG(EC_GOOGLE_CHROMEEC_INDEXED_IO) + id1 = read_byte_indexed_io(EC_LPC_ADDR_MEMMAP, EC_MEMMAP_ID); + id2 = read_byte_indexed_io(EC_LPC_ADDR_MEMMAP, EC_MEMMAP_ID + 1); + flags = read_byte_indexed_io(EC_LPC_ADDR_MEMMAP, EC_MEMMAP_HOST_CMD_FLAGS); #else id1 = read_byte(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID); id2 = read_byte(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID + 1); -- To view, visit https://review.coreboot.org/c/coreboot/+/85449?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6c1aab3fc914eb5af2736a8ea3adf447040905e0 Gerrit-Change-Number: 85449 Gerrit-PatchSet: 1 Gerrit-Owner: Jayvik Desai <jayvik(a)google.com>

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[S] Change in coreboot[main]: mb/google/brya/var/uldrenite: Generate RAM ID and SPD file
by Paul Menzel (Code Review) 03 Dec '24

03 Dec '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, John Su, Kapil Porwal, Nick Vaccaro, Subrata Banik. Paul Menzel has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/85447?usp=email ) Change subject: mb/google/brya/var/uldrenite: Generate RAM ID and SPD file ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85447/comment/bdf771d7_dcf5512b?us… : PS1, Line 10: Here is the ram part number list: : DRAM Part Name ID to assign : H9JCNNNBK3MLYR-N6E 0 (0000) : K3KL6L60GM-MGCT 1 (0001) : K3KL8L80CM-MGCT 2 (0010) : MT62F1G32D2DS-026 WT:B 2 (0010) : H58G56CK8BX146 3 (0011) Copying the file content is not needed. Maybe just mention the models with the vendor. -- To view, visit https://review.coreboot.org/c/coreboot/+/85447?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8003f693e1d8fa049a0e508078ce29b5bb39f2ef Gerrit-Change-Number: 85447 Gerrit-PatchSet: 1 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 03 Dec 2024 11:11:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: mb/google/brya/var/uldrenite: Add HDA verb tables
by John Su (Code Review) 03 Dec '24

03 Dec '24

John Su has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85448?usp=email ) Change subject: mb/google/brya/var/uldrenite: Add HDA verb tables ...................................................................... mb/google/brya/var/uldrenite: Add HDA verb tables We use ALC3204 as HDA codec on uldrenite, add the verb table. BUG=b:374203133 TEST=emerge-nissa coreboot Change-Id: Ie9d0e17e1ab13adc8aea0d5bcbbe44785a137d7b Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> --- A src/mainboard/google/brya/variants/uldrenite/hda_verb.c 1 file changed, 160 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/85448/1 diff --git a/src/mainboard/google/brya/variants/uldrenite/hda_verb.c b/src/mainboard/google/brya/variants/uldrenite/hda_verb.c new file mode 100644 index 0000000..f56cd70 --- /dev/null +++ b/src/mainboard/google/brya/variants/uldrenite/hda_verb.c @@ -0,0 +1,160 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { + /* coreboot specific header */ + 0x10ec0236, //Codec Vendor / Device ID: Realtek ALC3204 + 0x10280D76, // Subsystem ID + 0x00000021, // Number of jacks (NID entries) + + AZALIA_RESET(0x1), + /* NID 0x01, HDA Codec Subsystem ID Verb table */ + AZALIA_SUBVENDOR(0, 0x10280D76), + + /* Pin Widget Verb Table */ + /* + * DMIC + * Requirement is to use PCH DMIC. Hence, + * commented out codec's Internal DMIC. + * AZALIA_PIN_CFG(0, 0x12, 0x90A60130), + * AZALIA_PIN_CFG(0, 0x13, 0x40000000), + */ + AZALIA_PIN_CFG(0, 0x12, 0x90a60140), + AZALIA_PIN_CFG(0, 0x13, 0x40000000), + AZALIA_PIN_CFG(0, 0x14, 0x90170110), + AZALIA_PIN_CFG(0, 0x18, 0x411111f0), + AZALIA_PIN_CFG(0, 0x19, 0x02a11030), + AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), + AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), + AZALIA_PIN_CFG(0, 0x1d, 0x40700001), + AZALIA_PIN_CFG(0, 0x1e, 0x421212f2), + AZALIA_PIN_CFG(0, 0x21, 0x02211020), + + /* RESET to D0 */ + 0x00170500, + 0x00170500, + 0x00170500, + 0x00170500, + /* RESET Register */ + 0x0205001A, + 0x02048003, + 0x0205001A, + 0x0204C003, + /* ALC3204 default-1(Class D RESET) */ + 0x0205003C, + 0x02040354, + 0x0205003C, + 0x02040314, + /* ALC3204 default-2 (Tco) */ + 0x02050040, + 0x02049800, + 0x02050034, + 0x0204023C, + /* ALC3204 Speaker output power - 4 ohm 2W (+12dB gain) + * + Combo Jack TRS setting */ + 0x02050038, + 0x02043901, + 0x02050045, + 0x02045089, + /* H/W AGC setting-1 */ + 0x02050016, + 0x02040C50, + 0x02050012, + 0x0204EBC2, + /* H/W AGC setting-2 */ + 0x02050013, + 0x0204401D, + 0x02050016, + 0x02044E50, + /* Zero data + EAPD to verb-control */ + 0x02050037, + 0x0204FE15, + 0x02050010, + 0x02040020, + /* Zero data */ + 0x02050030, + 0x02048000, + 0x02050030, + 0x02048000, + /* ALC3204 default-3 */ + 0x05750003, + 0x05740DA3, + 0x02050046, + 0x02040004, + /* ALC3204 default-4 */ + 0x0205001B, + 0x02040A4B, + 0x02050008, + 0x02046A4C, + /* JD1 */ + 0x02050009, + 0x0204E003, + 0x0205000A, + 0x02047770, + /* JD2 */ + 0x0205000B, + 0x02047778, + 0x0205000B, + 0x02047778, + /* Microphone + Array MIC security Disable +ADC clock Enable */ + 0x0205000D, + 0x0204A020, + 0x02050005, + 0x02040700, + /* Speaker Enable */ + 0x0205000C, + 0x020401EF, + 0x0205000C, + 0x020401EF, + /* EQ Bypass + EQ HPF cutoff 250Hz */ + 0x05350000, + 0x0534201A, + 0x0535001d, + 0x05340800, + /* EQ-2 */ + 0x0535001e, + 0x05340800, + 0x05350003, + 0x05341EF8, + /* EQ-3 */ + 0x05350004, + 0x05340000, + 0x05450000, + 0x05442000, + /* EQ-4 */ + 0x0545001d, + 0x05440800, + 0x0545001e, + 0x05440800, + /* EQ-5 */ + 0x05450003, + 0x05441EF8, + 0x05450004, + 0x05440000, + /* EQ Update */ + 0x05350000, + 0x0534E01A, + 0x05350000, + 0x0534E01A, +}; + +const u32 pc_beep_verbs[] = { +//=== PCBeep pass through to NID14 for ePSA test-1 (D3 BEEP Detect) + 0x02050010, + 0x02040320, + 0x00170503, + 0x00170503, +//=== PCBeep pass through to NID14 for ePSA test-2 (Beep gain 0dB) + 0x02050036, + 0x02047717, + 0x02050036, + 0x02047717, +//=== PCBeep pass through to NID14 for ePSA test-3 + 0x01470740, + 0x0143B000, + 0x01470C02, + 0x01470C02, +}; + +AZALIA_ARRAY_SIZES; -- To view, visit https://review.coreboot.org/c/coreboot/+/85448?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie9d0e17e1ab13adc8aea0d5bcbbe44785a137d7b Gerrit-Change-Number: 85448 Gerrit-PatchSet: 1 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com>

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