coreboot-gerrit November 2024

coreboot-gerrit@coreboot.org

1 participants
2521 discussions

[S] Change in coreboot[main]: mb/google/dedede/var/drawcia: Update ext_vr for board version > 0xb
by Robert Chen (Code Review) 05 Nov '24

05 Nov '24

Attention is currently required from: Karthik Ramasubramanian, Paul Menzel, Robert Chen, Shou-Chieh Hsu. Hello Derek Huang, Karthik Ramasubramanian, Shou-Chieh Hsu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84953?usp=email to look at the new patch set (#16). Change subject: mb/google/dedede/var/drawcia: Update ext_vr for board version > 0xb ...................................................................... mb/google/dedede/var/drawcia: Update ext_vr for board version > 0xb ext_vr_update should be run after board version 0xb, but skipped by return. Drawper LTE board version was set after 0x9, but there are more board added after that. Specific Drawper board version as 0xa, 0xb and 0xf. BUG=b:376828839 BRANCH=firmware-dedede-13606.B TEST=emerge-dedede coreboot chromeos-bootimage and test on DUTs. Change-Id: I13f4709b6f490169f69054cf2b26430b4de0746a Signed-off-by: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> --- M src/mainboard/google/dedede/variants/drawcia/ramstage.c 1 file changed, 13 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/84953/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/84953?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I13f4709b6f490169f69054cf2b26430b4de0746a Gerrit-Change-Number: 84953 Gerrit-PatchSet: 16 Gerrit-Owner: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>

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[S] Change in coreboot[main]: mb/google/nissa/var/rull: add touchpad init config of Synaptics&PIXART
by Rui Zhou (Code Review) 05 Nov '24

05 Nov '24

Rui Zhou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84999?usp=email ) Change subject: mb/google/nissa/var/rull: add touchpad init config of Synaptics&PIXART ...................................................................... mb/google/nissa/var/rull: add touchpad init config of Synaptics&PIXART Add Synaptics&PIXART init cpnfig, enable touchpad function BUG=b:374629673 BRANCH=None TEST=1. emerge-nissa coreboot chromeos-bootimage 2. touchpad function normal Change-Id: Iacf09cd46d4a97fb79f91043c84452f76689462f Signed-off-by: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/variants/rull/overridetree.cb 1 file changed, 21 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/84999/1 diff --git a/src/mainboard/google/brya/variants/rull/overridetree.cb b/src/mainboard/google/brya/variants/rull/overridetree.cb index 2aa72ea..b59a0de 100644 --- a/src/mainboard/google/brya/variants/rull/overridetree.cb +++ b/src/mainboard/google/brya/variants/rull/overridetree.cb @@ -231,7 +231,27 @@ device i2c 1a on end end end - device ref i2c5 off end # Touchpad + device ref i2c5 on + chip drivers/i2c/hid + register "generic.hid" = ""SYNA0000"" + register "generic.cid" = ""ACPI0C50"" + register "generic.desc" = ""Synaptics Touchpad"" + register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)" + register "generic.wake" = "GPE0_DW2_14" + register "generic.detect" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 2c on end + end + chip drivers/i2c/hid + register "generic.hid" = ""PNP0C50"" + register "generic.desc" = ""PIXART Touchpad"" + register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)" + register "generic.wake" = "GPE0_DW2_14" + register "generic.detect" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 68 on end + end + end device ref cnvi_wifi on chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" -- To view, visit https://review.coreboot.org/c/coreboot/+/84999?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iacf09cd46d4a97fb79f91043c84452f76689462f Gerrit-Change-Number: 84999 Gerrit-PatchSet: 1 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com>

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[S] Change in coreboot[main]: mb/google/dedede/var/drawcia: Update ext_vr for board version > b
by Derek Huang (Code Review) 05 Nov '24

05 Nov '24

Attention is currently required from: Karthik Ramasubramanian, Paul Menzel, Robert Chen, Shou-Chieh Hsu. Derek Huang has posted comments on this change by Robert Chen. ( https://review.coreboot.org/c/coreboot/+/84953?usp=email ) Change subject: mb/google/dedede/var/drawcia: Update ext_vr for board version > b ...................................................................... Patch Set 15: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84953/comment/0e7a1d7d_1647682d?us… : PS15, Line 7: b 0xb -- To view, visit https://review.coreboot.org/c/coreboot/+/84953?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I13f4709b6f490169f69054cf2b26430b4de0746a Gerrit-Change-Number: 84953 Gerrit-PatchSet: 15 Gerrit-Owner: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-CC: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 05 Nov 2024 08:04:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/google/nissa/var/rull: add ssd timeing and modify ssd GPIO pins of...
by Rui Zhou (Code Review) 05 Nov '24

05 Nov '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rui Zhou. Hello Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84997?usp=email to look at the new patch set (#10). Change subject: mb/google/nissa/var/rull: add ssd timeing and modify ssd GPIO pins of rtd3 ...................................................................... mb/google/nissa/var/rull: add ssd timeing and modify ssd GPIO pins of rtd3 The previous GPIO config will cause the SSD device to not be recognized. We adjust the position of the enable and reset pins. BUG=b:374629673 BRANCH=None TEST=1. emerge-nissa coreboot chromeos-bootimage 2. power on proto board successfully Change-Id: Idb36f67206450612655cb3efd3cce240475ef3ab Signed-off-by: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/variants/rull/gpio.c M src/mainboard/google/brya/variants/rull/overridetree.cb 2 files changed, 28 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/84997/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/84997?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb36f67206450612655cb3efd3cce240475ef3ab Gerrit-Change-Number: 84997 Gerrit-PatchSet: 10 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>

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[M] Change in coreboot[main]: mb/google/nissa/var/rull: add ssd timeing and modify ssd GPIO pins of...
by Rui Zhou (Code Review) 05 Nov '24

05 Nov '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rui Zhou. Hello Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84997?usp=email to look at the new patch set (#9). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/nissa/var/rull: add ssd timeing and modify ssd GPIO pins of rtd3 ...................................................................... mb/google/nissa/var/rull: add ssd timeing and modify ssd GPIO pins of rtd3 The previous GPIO config will cause the SSD device to not be recognized. We adjust the position of the enable and reset pins. BUG=b:374629673 BRANCH=None TEST=1. emerge-nissa coreboot chromeos-bootimage 2. power on proto board successfully Change-Id: Idb36f67206450612655cb3efd3cce240475ef3ab Signed-off-by: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/variants/rull/gpio.c M src/mainboard/google/brya/variants/rull/overridetree.cb M src/mainboard/google/brya/variants/rull/variant.c 3 files changed, 31 insertions(+), 35 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/84997/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/84997?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb36f67206450612655cb3efd3cce240475ef3ab Gerrit-Change-Number: 84997 Gerrit-PatchSet: 9 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>

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[XS] Change in coreboot[main]: mb/google/dedede/var/awasuki: Enable LTR mechanism for PCIe root port 8
by Eric Lai (Code Review) 05 Nov '24

05 Nov '24

Attention is currently required from: Hualin Wei, Karthik Ramasubramanian, Subrata Banik. Eric Lai has posted comments on this change by Hualin Wei. ( https://review.coreboot.org/c/coreboot/+/84951?usp=email ) Change subject: mb/google/dedede/var/awasuki: Enable LTR mechanism for PCIe root port 8 ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/dedede/variants/awasuki/overridetree.cb: https://review.coreboot.org/c/coreboot/+/84951/comment/0554658e_70315229?us… : PS3, Line 3: PcieRpLtrEnable > We made modifications based on CL84866, and CL84866 defined this field. […] Please add the related chain otherwise it will build failed. -- To view, visit https://review.coreboot.org/c/coreboot/+/84951?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0c80f89b4fdb52a5d9da17548537072ec2d40418 Gerrit-Change-Number: 84951 Gerrit-PatchSet: 3 Gerrit-Owner: Hualin Wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Hualin Wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 05 Nov 2024 07:58:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hualin Wei <weihualin(a)huaqin.corp-partner.google.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com>

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[M] Change in coreboot[main]: mb/google/nissa/var/rull: add touchpad init config, change ssd timeing
by Subrata Banik (Code Review) 05 Nov '24

05 Nov '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rui Zhou. Subrata Banik has posted comments on this change by Rui Zhou. ( https://review.coreboot.org/c/coreboot/+/84997?usp=email ) Change subject: mb/google/nissa/var/rull: add touchpad init config, change ssd timeing ...................................................................... Patch Set 8: (3 comments) Patchset: PS8: why not split the change into 3 cls 1. touch pad 2. wifi 3. SSD File src/mainboard/google/brya/variants/rull/gpio.c: https://review.coreboot.org/c/coreboot/+/84997/comment/63929cf5_f4a96d5d?us… : PS8, Line 32: : /* D11 : EN_PP1800_WCAM_X ==> EN_PP3300_SSD_X */ : PAD_CFG_GPO(GPP_D11, 1, DEEP), already done https://review.coreboot.org/c/coreboot/+/84997/8/src/mainboard/google/brya/…, do we still need it here ? https://review.coreboot.org/c/coreboot/+/84997/comment/4efce8df_bd75171c?us… : PS8, Line 36: PAD_CFG_GPO_LOCK(GPP_B4, 1, LOCK_CONFIG), note, this PIN is getting locked so, won't be able to alter the configuration from kernel if needed ? -- To view, visit https://review.coreboot.org/c/coreboot/+/84997?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idb36f67206450612655cb3efd3cce240475ef3ab Gerrit-Change-Number: 84997 Gerrit-PatchSet: 8 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 05 Nov 2024 07:42:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add SPI driver support
by Jarried Lin (Code Review) 05 Nov '24

05 Nov '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84930?usp=email ) Change subject: soc/mediatek/mt8196: Add SPI driver support ...................................................................... Patch Set 7: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84930/comment/f0a62682_f6ec573f?us… : PS6, Line 9: ( > space before `(` Done File src/soc/mediatek/mt8196/include/soc/spi.h: https://review.coreboot.org/c/coreboot/+/84930/comment/40fbbc00_8b2a89a1?us… : PS6, Line 15: #define GET_SCK_REG(x) (x)->spi_cfg2_reg > > `Macros with complex values should be enclosed in parentheses` […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84930?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I10dd1105931c4911ce5257803073b7af76115c75 Gerrit-Change-Number: 84930 Gerrit-PatchSet: 7 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 05 Nov 2024 07:41:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add SPI driver support
by Jarried Lin (Code Review) 05 Nov '24

05 Nov '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yidi Lin. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84930?usp=email to look at the new patch set (#7). Change subject: soc/mediatek/mt8196: Add SPI driver support ...................................................................... soc/mediatek/mt8196: Add SPI driver support Add SPI controller driver code with support for 8 buses (SPI0 to SPI7). Test=Build pass, verify the wavefroms for SPI0~7 are correct. BUG=b:317009620 Change-Id: I10dd1105931c4911ce5257803073b7af76115c75 Signed-off-by: Liya Li <ot_liya.li(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/mt8196/Makefile.mk M src/soc/mediatek/mt8196/include/soc/spi.h M src/soc/mediatek/mt8196/spi.c 3 files changed, 120 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/84930/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/84930?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I10dd1105931c4911ce5257803073b7af76115c75 Gerrit-Change-Number: 84930 Gerrit-PatchSet: 7 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Enable lastbus debug hardware
by Yu-Ping Wu (Code Review) 05 Nov '24

05 Nov '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84928?usp=email ) Change subject: soc/mediatek/mt8196: Enable lastbus debug hardware ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84928?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib030d88faa2d4d6f6a8501f8c752deeafff92c5c Gerrit-Change-Number: 84928 Gerrit-PatchSet: 6 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 05 Nov 2024 07:31:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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coreboot-gerrit November 2024