coreboot-gerrit January 2024

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[XS] Change in coreboot[master]: mb/google/guybrush: turn off SD ASPM L1.1/L1.2
by Tim Van Patten (Code Review) 30 Jan '24

30 Jan '24

Attention is currently required from: Felix Held, Jason Nein, Jason Nien, Martin Roth, Matt DeVillier. Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80237?usp=email ) Change subject: mb/google/guybrush: turn off SD ASPM L1.1/L1.2 ...................................................................... Patch Set 1: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/80237/comment/da7dfc4d_a64ddb0d : PS1, Line 9: turn off SD ASPM L1.1/L1.2 as w/a for wlan DMA resume failure Are there any guesses as to why the SD PCIe bus is able to affect the WLAN DMA? How are the two busses affecting each other? https://review.coreboot.org/c/coreboot/+/80237/comment/0e54ac5c_6fa307f2 : PS1, Line 12: TEST=test pass over 10k cycles Please also measure the power impact of this change. You can use the following CL as an example: https://review.coreboot.org/c/coreboot/+/77963 Patchset: PS1: As noted by the build bot, please use the `main` branch. -- To view, visit https://review.coreboot.org/c/coreboot/+/80237?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d903f0f6333ffa18069e42be3c932aeae8013d9 Gerrit-Change-Number: 80237 Gerrit-PatchSet: 1 Gerrit-Owner: Jason Nein <finaljason(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Jason Nein <finaljason(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 30 Jan 2024 00:26:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: mb/google/guybrush: turn off SD ASPM L1.1/L1.2
by Jason Nein (Code Review) 30 Jan '24

30 Jan '24

Jason Nein has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80237?usp=email ) Change subject: mb/google/guybrush: turn off SD ASPM L1.1/L1.2 ...................................................................... mb/google/guybrush: turn off SD ASPM L1.1/L1.2 turn off SD ASPM L1.1/L1.2 as w/a for wlan DMA resume failure BUG=b:254382832 TEST=test pass over 10k cycles Signed-off-by: JasonNien <finaljason(a)gmail.com> Change-Id: I4d903f0f6333ffa18069e42be3c932aeae8013d9 --- M src/mainboard/google/guybrush/port_descriptors.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/80237/1 diff --git a/src/mainboard/google/guybrush/port_descriptors.c b/src/mainboard/google/guybrush/port_descriptors.c index fc6ccb8..a056a19 100644 --- a/src/mainboard/google/guybrush/port_descriptors.c +++ b/src/mainboard/google/guybrush/port_descriptors.c @@ -33,8 +33,8 @@ .device_number = PCI_SLOT(SD_DEVFN), .function_number = PCI_FUNC(SD_DEVFN), .link_aspm = ASPM_L1, - .link_aspm_L1_1 = true, - .link_aspm_L1_2 = true, + .link_aspm_L1_1 = false, + .link_aspm_L1_2 = false, .turn_off_unused_lanes = true, .clk_req = CLK_REQ1, .gpio_group_id = GPIO_69, -- To view, visit https://review.coreboot.org/c/coreboot/+/80237?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d903f0f6333ffa18069e42be3c932aeae8013d9 Gerrit-Change-Number: 80237 Gerrit-PatchSet: 1 Gerrit-Owner: Jason Nein <finaljason(a)gmail.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: soc/intel: Use write{64,32,16,8}p and read{64,32,16,8}p
by Julius Werner (Code Review) 30 Jan '24

30 Jan '24

Attention is currently required from: Arthur Heymans, Christian Walter, Dinesh Gehlot, Elyes Haouas, Eran Mitrani, Jeff Daly, Johnny Lin, Kapil Porwal, Subrata Banik, Tarun, Tim Chu, Vanessa Eusebio. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80193?usp=email ) Change subject: soc/intel: Use write{64,32,16,8}p and read{64,32,16,8}p ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Is this really a good idea? I think we intentionally made the `write32()` function take a `void *` (and not just be a macro that includes the cast automatically, as I believe it actually was at some point in the early days until it was eventually cleaned up). Allowing raw integers to be thrown around as addresses increases the potential for errors. If we now introduce a new macro that does the cast, even if it has a different name, I think we are weakening that type safety by giving authors who don't like to separate types cleanly an easy and convenient crutch to lean on. Basically, I think when you're trying to call write32() with an integer address then in 99% of the cases that means you already made a mistake beforehand, and should've been keeping that address in a pointer variable instead. Obviously not all our code is written perfectly (especially some of the older stuff... e.g. Braswell isn't exactly recent code), and we aren't always there to insist on perfect type hygiene in every review, but forcing people to write a cumbersome type cast on every call if they use integers to hold addresses acts as a sort of forcing function that helps automatically push them towards cleaner ways to write things. That's why I don't believe we should be proliferating macros that make the "bad" way to write things easier. (In fact, I'm not sure how that `write32p()` function of families came into the code base, I'd suggest we get rid of it again.) -- To view, visit https://review.coreboot.org/c/coreboot/+/80193?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4022e3bbfacf35d0529e46dc82cf303dae9438e4 Gerrit-Change-Number: 80193 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Mon, 29 Jan 2024 23:47:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/guybrush: turn off SD ASPM L1.1/L1.2
by Jason Nein (Code Review) 30 Jan '24

30 Jan '24

Jason Nein has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/80236?usp=email ) Change subject: mb/google/guybrush: turn off SD ASPM L1.1/L1.2 ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/80236?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6500a54aaaaad8818b0aa61eeb0d831e8fc325e4 Gerrit-Change-Number: 80236 Gerrit-PatchSet: 1 Gerrit-Owner: Jason Nein <finaljason(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in coreboot[master]: mb/google/guybrush: turn off SD ASPM L1.1/L1.2
by Jason Nein (Code Review) 30 Jan '24

30 Jan '24

Jason Nein has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80236?usp=email ) Change subject: mb/google/guybrush: turn off SD ASPM L1.1/L1.2 ...................................................................... mb/google/guybrush: turn off SD ASPM L1.1/L1.2 turn off SD ASPM L1.1/L1.2 as w/a for wlan DMA resume failure BUG=b:254382832 TEST=test pass over 10k cycles Signed-off-by: JasonNien <finaljason(a)gmail.com> Change-Id: I6500a54aaaaad8818b0aa61eeb0d831e8fc325e4 --- M 3rdparty/arm-trusted-firmware M 3rdparty/chromeec M 3rdparty/libgfxinit M src/mainboard/google/guybrush/port_descriptors.c 4 files changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/80236/1 diff --git a/3rdparty/arm-trusted-firmware b/3rdparty/arm-trusted-firmware index 23d6774..5906d97 160000 --- a/3rdparty/arm-trusted-firmware +++ b/3rdparty/arm-trusted-firmware @@ -1 +1 @@ -Subproject commit 23d6774ab53ded09d8065a184b4763504e9c8d9e +Subproject commit 5906d97a832b6f6c4ee58557a4ff197ddb358135 diff --git a/3rdparty/chromeec b/3rdparty/chromeec index e486b38..6f1231f 160000 --- a/3rdparty/chromeec +++ b/3rdparty/chromeec @@ -1 +1 @@ -Subproject commit e486b388a73f1e19f3142774d0b3ee166e8f41ff +Subproject commit 6f1231f6b42bbc723747e733a825672e6c661d72 diff --git a/3rdparty/libgfxinit b/3rdparty/libgfxinit index a4be8a2..0dadb67 160000 --- a/3rdparty/libgfxinit +++ b/3rdparty/libgfxinit @@ -1 +1 @@ -Subproject commit a4be8a21b0e2c752da0042c79aae5942418f53e2 +Subproject commit 0dadb674cc98974378ccceccc8c557197a2bad16 diff --git a/src/mainboard/google/guybrush/port_descriptors.c b/src/mainboard/google/guybrush/port_descriptors.c index fc6ccb8..a056a19 100644 --- a/src/mainboard/google/guybrush/port_descriptors.c +++ b/src/mainboard/google/guybrush/port_descriptors.c @@ -33,8 +33,8 @@ .device_number = PCI_SLOT(SD_DEVFN), .function_number = PCI_FUNC(SD_DEVFN), .link_aspm = ASPM_L1, - .link_aspm_L1_1 = true, - .link_aspm_L1_2 = true, + .link_aspm_L1_1 = false, + .link_aspm_L1_2 = false, .turn_off_unused_lanes = true, .clk_req = CLK_REQ1, .gpio_group_id = GPIO_69, -- To view, visit https://review.coreboot.org/c/coreboot/+/80236?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6500a54aaaaad8818b0aa61eeb0d831e8fc325e4 Gerrit-Change-Number: 80236 Gerrit-PatchSet: 1 Gerrit-Owner: Jason Nein <finaljason(a)gmail.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: soc/intel/xeon_sp/spr: Create CXL ACPI resources only for CXL IIO stacks
by Felix Held (Code Review) 29 Jan '24

29 Jan '24

Attention is currently required from: Shuo Liu. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80087?usp=email ) Change subject: soc/intel/xeon_sp/spr: Create CXL ACPI resources only for CXL IIO stacks ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/80087/comment/e1a4c694_c2a7989c : PS4, Line 7: soc/intel/xeon_sp/spr: Create CXL ACPI resources only for : CXL IIO stacks > sorry my bad, I forgot to catch that. oh, missed that one too -- To view, visit https://review.coreboot.org/c/coreboot/+/80087?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6c1b1343991bc73d90a433d959f6618bbf59532f Gerrit-Change-Number: 80087 Gerrit-PatchSet: 4 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Comment-Date: Mon, 29 Jan 2024 22:16:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/amd/common/acpi: Add weak CPPC min/nomimal functions
by Matt DeVillier (Code Review) 29 Jan '24

29 Jan '24

Matt DeVillier has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/79017?usp=email ) Change subject: soc/amd/common/acpi: Add weak CPPC min/nomimal functions ...................................................................... Abandoned superseded by newer patch train -- To view, visit https://review.coreboot.org/c/coreboot/+/79017?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3cea9b0a8e11aff1949fedbbecba575b351c1706 Gerrit-Change-Number: 79017 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: abandon

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[XS] Change in coreboot[main]: soc/amd/common/pci: Add weak impl. of get_pci_routing_table()
by Matt DeVillier (Code Review) 29 Jan '24

29 Jan '24

Matt DeVillier has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/79018?usp=email ) Change subject: soc/amd/common/pci: Add weak impl. of get_pci_routing_table() ...................................................................... Abandoned superseded by newer patch train -- To view, visit https://review.coreboot.org/c/coreboot/+/79018?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I873a528f02018bf5c6975bbcee8fbc4b123a06f7 Gerrit-Change-Number: 79018 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: abandon

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[M] Change in coreboot[main]: util/ifdtool: Add new cmdline to enable GPR0 protection
by Stefan Reinauer (Code Review) 29 Jan '24

29 Jan '24

Attention is currently required from: Reka Norman, Subrata Banik. Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80235?usp=email ) Change subject: util/ifdtool: Add new cmdline to enable GPR0 protection ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80235?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I27c533ae4109c79299f4e7ff75e750d7cc64280f Gerrit-Change-Number: 80235 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Comment-Date: Mon, 29 Jan 2024 19:22:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: util/ifdtool: Add new cmdline to enable GPR0 protection
by Subrata Banik (Code Review) 29 Jan '24

29 Jan '24

Attention is currently required from: Reka Norman, Stefan Reinauer. Hello Reka Norman, Stefan Reinauer, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80235?usp=email to look at the new patch set (#3). Change subject: util/ifdtool: Add new cmdline to enable GPR0 protection ...................................................................... util/ifdtool: Add new cmdline to enable GPR0 protection This patch adds new cmdline `-E` support in the IFD Tool so that users (mostly factory) can enable GPR0 protection. Additionally, perform some code refactoring while adding support for enable GPR0 protection. BUG=b:270275115 TEST=Able to test GPR0 protection on google/rex and google/yahiko. > ifdtool -p mtl -E image.bin -O image.bin_lock --------- GPR0 Protected Range -------------- Start address = 0x00004000 End address = 0x00322fff Change-Id: I27c533ae4109c79299f4e7ff75e750d7cc64280f Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M util/ifdtool/ifdtool.c M util/ifdtool/ifdtool.h 2 files changed, 187 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/80235/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/80235?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I27c533ae4109c79299f4e7ff75e750d7cc64280f Gerrit-Change-Number: 80235 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit January 2024