coreboot-gerrit August 2023

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[S] Change in coreboot[master]: mb/google/brya/var/felwinter: Add new GFX devices with custom _PLD
by Won Chung (Code Review) 01 Aug '23

01 Aug '23

Attention is currently required from: Tarun Tuli. Won Chung has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76898?usp=email ) Change subject: mb/google/brya/var/felwinter: Add new GFX devices with custom _PLD ...................................................................... mb/google/brya/var/felwinter: Add new GFX devices with custom _PLD Add new GFX devices for DDI and TCP with custom _PLD to describe the corresponding ports. BUG=b:277629750 TEST=emerge-brya coreboot Change-Id: I7be4a47ea2a8cb2b6f4a2d633252eec523807da6 Signed-off-by: Won Chung <wonchung(a)google.com> --- M src/mainboard/google/brya/variants/felwinter/overridetree.cb 1 file changed, 22 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/76898/1 diff --git a/src/mainboard/google/brya/variants/felwinter/overridetree.cb b/src/mainboard/google/brya/variants/felwinter/overridetree.cb index 9e7e739..d0577a4 100644 --- a/src/mainboard/google/brya/variants/felwinter/overridetree.cb +++ b/src/mainboard/google/brya/variants/felwinter/overridetree.cb @@ -93,6 +93,28 @@ }" device domain 0 on + device ref igpu on + chip drivers/gfx/generic + register "device_count" = "6" + # DDIA for eDP + register "device[0].name" = ""LCD"" + # DDIB for HDMI + register "device[1].name" = ""DD01"" + # TCP0 (DP-1) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP0 + register "device[2].name" = ""DD02"" + # TCP1 (DP-2) for port C1 + register "device[3].name" = ""DD03"" + register "device[3].use_pld" = "true" + register "device[3].pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))" + # TCP2 (DP-3) for port C2 + register "device[4].name" = ""DD04"" + register "device[4].use_pld" = "true" + register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))" + # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3 + register "device[5].name" = ""DD05"" + device generic 0 on end + end + end # Integrated Graphics Device device ref dtt on chip drivers/intel/dptf ## sensor information -- To view, visit https://review.coreboot.org/c/coreboot/+/76898?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7be4a47ea2a8cb2b6f4a2d633252eec523807da6 Gerrit-Change-Number: 76898 Gerrit-PatchSet: 1 Gerrit-Owner: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/brya/var/crota: Add new GFX devices with custom _PLD
by Won Chung (Code Review) 01 Aug '23

01 Aug '23

Attention is currently required from: Tarun Tuli. Won Chung has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76897?usp=email ) Change subject: mb/google/brya/var/crota: Add new GFX devices with custom _PLD ...................................................................... mb/google/brya/var/crota: Add new GFX devices with custom _PLD Add new GFX devices for DDI and TCP with custom _PLD to describe the corresponding ports. BUG=b:277629750 TEST=emerge-brya coreboot Change-Id: Ic5343de88f5f089c9ec4a992f5a6383c08641568 Signed-off-by: Won Chung <wonchung(a)google.com> --- M src/mainboard/google/brya/variants/crota/overridetree.cb 1 file changed, 21 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/76897/1 diff --git a/src/mainboard/google/brya/variants/crota/overridetree.cb b/src/mainboard/google/brya/variants/crota/overridetree.cb index ff3a1c1..9a2aeb3 100644 --- a/src/mainboard/google/brya/variants/crota/overridetree.cb +++ b/src/mainboard/google/brya/variants/crota/overridetree.cb @@ -107,6 +107,27 @@ register "tcc_offset" = "1" # TCC of 99C device domain 0 on + chip drivers/gfx/generic + register "device_count" = "6" + # DDIA for eDP + register "device[0].name" = ""LCD"" + # DDIB for HDMI + register "device[1].name" = ""DD01"" + # TCP0 (DP-1) for port C0 + register "device[2].name" = ""DD02"" + register "device[2].use_pld" = "true" + register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))" + # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1 + register "device[3].name" = ""DD03"" + # TCP2 (DP-3) for port C2 + register "device[4].name" = ""DD04"" + register "device[4].use_pld" = "true" + register "device[4].pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))" + # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3 + register "device[5].name" = ""DD05"" + device generic 0 on end + end + end # Integrated Graphics Device device ref dtt on chip drivers/intel/dptf ## sensor information -- To view, visit https://review.coreboot.org/c/coreboot/+/76897?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic5343de88f5f089c9ec4a992f5a6383c08641568 Gerrit-Change-Number: 76897 Gerrit-PatchSet: 1 Gerrit-Owner: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: ec/google/chromeec/ec_commands.h: Use C99 flexible arrays
by Caveh Jalali (Code Review) 01 Aug '23

01 Aug '23

Attention is currently required from: Boris Mittelberg, Elyes Haouas, Jakub Czapiga. Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76838?usp=email ) Change subject: ec/google/chromeec/ec_commands.h: Use C99 flexible arrays ...................................................................... Patch Set 1: (1 comment) File src/ec/google/chromeec/ec_commands.h: PS1: > This file is a copy of [ChromeEC ec_commands.h](https://chromium.googlesource. […] +1 this file need to be kept in sync with its parent copy for correctness. you can update it with a script we recently provided in https://review.coreboot.org/c/coreboot/+/74879. however, we really need to make sure these changes are appropriate in the EC repo first. please see `FLEXIBLE_ARRAY_MEMBER_SIZE` at the beginning of this file. -- To view, visit https://review.coreboot.org/c/coreboot/+/76838?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa8ec6638d1141251ecaae6668ca07efa9d14006 Gerrit-Change-Number: 76838 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Tue, 01 Aug 2023 19:43:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/brya/var/banshee: Add new GFX devices with custom _PLD
by Won Chung (Code Review) 01 Aug '23

01 Aug '23

Attention is currently required from: Tarun Tuli. Won Chung has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76896?usp=email ) Change subject: mb/google/brya/var/banshee: Add new GFX devices with custom _PLD ...................................................................... mb/google/brya/var/banshee: Add new GFX devices with custom _PLD Add new GFX devices for DDI and TCP with custom _PLD to describe the corresponding ports. BUG=b:277629750 TEST=emerge-brya coreboot Change-Id: Iced1061bab224d918fd5f0525423ac6858e1799b Signed-off-by: Won Chung <wonchung(a)google.com> --- M src/mainboard/google/brya/variants/banshee/overridetree.cb 1 file changed, 26 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/76896/1 diff --git a/src/mainboard/google/brya/variants/banshee/overridetree.cb b/src/mainboard/google/brya/variants/banshee/overridetree.cb index c25209e..3e3c33c 100644 --- a/src/mainboard/google/brya/variants/banshee/overridetree.cb +++ b/src/mainboard/google/brya/variants/banshee/overridetree.cb @@ -94,6 +94,32 @@ }" device domain 0 on + device ref igpu on + chip drivers/gfx/generic + register "device_count" = "6" + # DDIA for eDP + register "device[0].name" = ""LCD"" + # DDIB for HDMI + register "device[1].name" = ""DD01"" + # TCP0 (DP-1) for port C0 + register "device[2].name" = ""DD02"" + register "device[2].use_pld" = "true" + register "device[2].pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))" + # TCP1 (DP-2) for port C1 + register "device[3].name" = ""DD03"" + register "device[3].use_pld" = "true" + register "device[3].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" + # TCP2 (DP-3) for port C2 + register "device[4].name" = ""DD04"" + register "device[4].use_pld" = "true" + register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))" + # TCP3 (DP-4) for port C3 + register "device[5].name" = ""DD05"" + register "device[5].use_pld" = "true" + register "device[5].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(4, 1))" + device generic 0 on end + end + end # Integrated Graphics Device device ref dtt on chip drivers/intel/dptf ## sensor information -- To view, visit https://review.coreboot.org/c/coreboot/+/76896?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iced1061bab224d918fd5f0525423ac6858e1799b Gerrit-Change-Number: 76896 Gerrit-PatchSet: 1 Gerrit-Owner: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: mb/google/brya/var/anahera: Add new GFX devices with custom _PLD
by Won Chung (Code Review) 01 Aug '23

01 Aug '23

Attention is currently required from: Tarun Tuli. Won Chung has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76875?usp=email ) Change subject: mb/google/brya/var/anahera: Add new GFX devices with custom _PLD ...................................................................... mb/google/brya/var/anahera: Add new GFX devices with custom _PLD Add new GFX devices for DDI and TCP with custom _PLD to describe the corresponding ports. BUG=b:277629750 TEST=emerge-brya coreboot Change-Id: I7a775838358e7abe3f03d0ae65fb619c15dbad6f Signed-off-by: Won Chung <wonchung(a)google.com> --- M src/mainboard/google/brya/variants/anahera/overridetree.cb M src/mainboard/google/brya/variants/anahera4es/overridetree.cb 2 files changed, 76 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/76875/1 diff --git a/src/mainboard/google/brya/variants/anahera/overridetree.cb b/src/mainboard/google/brya/variants/anahera/overridetree.cb index 4889696..947d5b8 100644 --- a/src/mainboard/google/brya/variants/anahera/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera/overridetree.cb @@ -87,7 +87,8 @@ device domain 0 on device ref igpu on chip drivers/gfx/generic - register "device_count" = "1" + register "device_count" = "6" + # DDIA for eDP register "device[0].name" = ""LCD"" # Use ChromeOS privacy screen _HID register "device[0].hid" = ""GOOG0010"" @@ -95,10 +96,46 @@ register "device[0].addr" = "0x80010400" register "device[0].privacy.enabled" = "1" register "device[0].privacy.gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H21)" + # DDIB for HDMI + register "device[1].name" = ""DD01"" + # TCP0 (DP-1) for port C0 + register "device[2].name" = ""DD02"" + register "device[2].use_pld" = "true" + register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))" + # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1 + register "device[3].name" = ""DD03"" + # TCP2 (DP-3) for port C2 + register "device[4].name" = ""DD04"" + register "device[4].use_pld" = "true" + register "device[4].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" + # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3 + register "device[5].name" = ""DD05"" device generic 0 on probe EPS PRIVACY_SCREEN end end + chip drivers/gfx/generic + register "device_count" = "6" + # DDIA for eDP + register "device[0].name" = ""LCD"" + # DDIB for HDMI + register "device[1].name" = ""DD01"" + # TCP0 (DP-1) for port C0 + register "device[2].name" = ""DD02"" + register "device[2].use_pld" = "true" + register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))" + # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1 + register "device[3].name" = ""DD03"" + # TCP2 (DP-3) for port C2 + register "device[4].name" = ""DD04"" + register "device[4].use_pld" = "true" + register "device[4].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" + # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3 + register "device[5].name" = ""DD05"" + device generic 0 on + probe EPS PRIVACY_SCREEN_ABSENT + end + end end # Integrated Graphics Device device ref dtt on chip drivers/intel/dptf diff --git a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb index 2d19394..c37b2f5 100644 --- a/src/mainboard/google/brya/variants/anahera4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/anahera4es/overridetree.cb @@ -69,7 +69,8 @@ device domain 0 on device ref igpu on chip drivers/gfx/generic - register "device_count" = "1" + register "device_count" = "6" + # DDIA for eDP register "device[0].name" = ""LCD"" # Use ChromeOS privacy screen _HID register "device[0].hid" = ""GOOG0010"" @@ -77,10 +78,46 @@ register "device[0].addr" = "0x80010400" register "device[0].privacy.enabled" = "1" register "device[0].privacy.gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H21)" + # DDIB for HDMI + register "device[1].name" = ""DD01"" + # TCP0 (DP-1) for port C0 + register "device[2].name" = ""DD02"" + register "device[2].use_pld" = "true" + register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))" + # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1 + register "device[3].name" = ""DD03"" + # TCP2 (DP-3) for port C2 + register "device[4].name" = ""DD04"" + register "device[4].use_pld" = "true" + register "device[4].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" + # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3 + register "device[5].name" = ""DD05"" device generic 0 on probe EPS PRIVACY_SCREEN end end + chip drivers/gfx/generic + register "device_count" = "6" + # DDIA for eDP + register "device[0].name" = ""LCD"" + # DDIB for HDMI + register "device[1].name" = ""DD01"" + # TCP0 (DP-1) for port C0 + register "device[2].name" = ""DD02"" + register "device[2].use_pld" = "true" + register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))" + # TCP1 (DP-2) is unused for any ports but still enumerated, so GFX device is added for TCP1 + register "device[3].name" = ""DD03"" + # TCP2 (DP-3) for port C2 + register "device[4].name" = ""DD04"" + register "device[4].use_pld" = "true" + register "device[4].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" + # TCP3 (DP-4) is unused for any ports but still enumerated, so GFX device is added for TCP3 + register "device[5].name" = ""DD05"" + device generic 0 on + probe EPS PRIVACY_SCREEN_ABSENT + end + end end # Integrated Graphics Device device ref dtt on chip drivers/intel/dptf -- To view, visit https://review.coreboot.org/c/coreboot/+/76875?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a775838358e7abe3f03d0ae65fb619c15dbad6f Gerrit-Change-Number: 76875 Gerrit-PatchSet: 1 Gerrit-Owner: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/brya/var/agah: Add new GFX devices with custom _PLD
by Won Chung (Code Review) 01 Aug '23

01 Aug '23

Attention is currently required from: Tarun Tuli. Won Chung has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76874?usp=email ) Change subject: mb/google/brya/var/agah: Add new GFX devices with custom _PLD ...................................................................... mb/google/brya/var/agah: Add new GFX devices with custom _PLD Add new GFX devices for DDI and TCP with custom _PLD to describe the corresponding ports. BUG=b:277629750 TEST=emerge-brya coreboot Change-Id: I5aee59a3b1a29cd4213d10667a0a1f91b98acb64 Signed-off-by: Won Chung <wonchung(a)google.com> --- M src/mainboard/google/brya/variants/agah/overridetree.cb 1 file changed, 22 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/76874/1 diff --git a/src/mainboard/google/brya/variants/agah/overridetree.cb b/src/mainboard/google/brya/variants/agah/overridetree.cb index 52b9fcd..13a3519 100644 --- a/src/mainboard/google/brya/variants/agah/overridetree.cb +++ b/src/mainboard/google/brya/variants/agah/overridetree.cb @@ -90,6 +90,28 @@ }" device pci 00.0 alias dgpu on end end + device ref igpu on + chip drivers/gfx/generic + register "device_count" = "6" + # DDIA for eDP + register "device[0].name" = ""LCD"" + # DDIB for HDMI + register "device[1].name" = ""DD01"" + # TCP0 (DP-1) for port C2 + register "device[2].name" = ""DD02"" + register "device[2].use_pld" = "true" + register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))" + # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1 + register "device[3].name" = ""DD03"" + # TCP2 (DP-3) for port C0 + register "device[4].name" = ""DD04"" + register "device[4].use_pld" = "true" + register "device[4].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(1, 1))" + # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3 + register "device[5].name" = ""DD05"" + device generic 0 on end + end + end # Integrated Graphics Device device ref dtt on chip drivers/intel/dptf ## sensor information -- To view, visit https://review.coreboot.org/c/coreboot/+/76874?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5aee59a3b1a29cd4213d10667a0a1f91b98acb64 Gerrit-Change-Number: 76874 Gerrit-PatchSet: 1 Gerrit-Owner: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/brya: Add DRIVERS_GFX_GENERIC to BRYA and NISSA by default
by Won Chung (Code Review) 01 Aug '23

01 Aug '23

Won Chung has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76873?usp=email ) Change subject: mb/google/brya: Add DRIVERS_GFX_GENERIC to BRYA and NISSA by default ...................................................................... mb/google/brya: Add DRIVERS_GFX_GENERIC to BRYA and NISSA by default All boards based on brya and nissa will have GFX devices to represent DRM connectors in the kernel's /sys/class/drm/. BUG=b:277629750 TEST=emerge-brya coreboot Change-Id: I11afa9e8a1c8bf9f57bf6d195f07531182bd36f1 Signed-off-by: Won Chung <wonchung(a)google.com> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/Kconfig.name 2 files changed, 2 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/76873/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 1a56d35..3fbd8af 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -43,6 +43,7 @@ select BOARD_GOOGLE_BRYA_COMMON select BOARD_ROMSIZE_KB_32768 select DRIVERS_AUDIO_SOF + select DRIVERS_GFX_GENERIC select HAVE_SLP_S0_GATE select MEMORY_SOLDERDOWN if !BOARD_GOOGLE_BANSHEE select SOC_INTEL_ALDERLAKE_PCH_P @@ -82,6 +83,7 @@ select BOARD_GOOGLE_BRYA_COMMON select BOARD_ROMSIZE_KB_16384 if !BOARD_ROMSIZE_KB_32768 select CHROMEOS_DRAM_PART_NUMBER_IN_CBI if CHROMEOS + select DRIVERS_GFX_GENERIC select DRIVERS_INTEL_ISH select MAINBOARD_DISABLE_STAGE_CACHE select MEMORY_SOLDERDOWN diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index f7f2b75..322b230 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -16,7 +16,6 @@ select BOARD_GOOGLE_BASEBOARD_BRYA select DRIVERS_GENESYSLOGIC_GL9763E select DRIVERS_GENESYSLOGIC_GL9750 - select DRIVERS_GFX_GENERIC select HAVE_PCIE_WWAN select HAVE_WWAN_POWER_SEQUENCE @@ -26,7 +25,6 @@ select DEFAULT_ADL_NEM select DRIVERS_GENESYSLOGIC_GL9763E select DRIVERS_GENESYSLOGIC_GL9750 - select DRIVERS_GFX_GENERIC select HAVE_PCIE_WWAN select HAVE_WWAN_POWER_SEQUENCE @@ -46,7 +44,6 @@ select DRIVERS_INTEL_MIPI_CAMERA select SOC_INTEL_COMMON_BLOCK_IPU select SOC_INTEL_CRASHLOG - select DRIVERS_GFX_GENERIC config BOARD_GOOGLE_FELWINTER bool "-> Felwinter" @@ -122,7 +119,6 @@ select GOOGLE_DSM_CALIB if VPD select GOOGLE_DSM_PARAM_FILE_NAME if VPD select DRIVERS_GENESYSLOGIC_GL9755 - select DRIVERS_GFX_GENERIC select DRIVERS_I2C_MAX98390 select DRIVERS_INTEL_MIPI_CAMERA select EC_GOOGLE_CHROMEEC_INCLUDE_SSFC_IN_FW_CONFIG @@ -135,7 +131,6 @@ select GOOGLE_DSM_PARAM_FILE_NAME if VPD select DEFAULT_ADL_NEM select DRIVERS_GENESYSLOGIC_GL9755 - select DRIVERS_GFX_GENERIC select DRIVERS_I2C_MAX98390 select DRIVERS_INTEL_MIPI_CAMERA select EC_GOOGLE_CHROMEEC_INCLUDE_SSFC_IN_FW_CONFIG @@ -150,7 +145,6 @@ select DRIVERS_I2C_SX9324 select DRIVERS_I2C_SX9324_SUPPORT_LEGACY_LINUX_DRIVER select SOC_INTEL_COMMON_BLOCK_IPU - select DRIVERS_GFX_GENERIC config BOARD_GOOGLE_SKOLAS4ES bool "-> Skolas4ES" @@ -162,7 +156,6 @@ select DRIVERS_I2C_SX9324 select DRIVERS_I2C_SX9324_SUPPORT_LEGACY_LINUX_DRIVER select SOC_INTEL_COMMON_BLOCK_IPU - select DRIVERS_GFX_GENERIC config BOARD_GOOGLE_TAEKO bool "-> Taeko" @@ -196,7 +189,6 @@ bool "-> Vell" select BOARD_GOOGLE_BASEBOARD_BRYA select CHROMEOS_WIFI_SAR if CHROMEOS - select DRIVERS_GFX_GENERIC select DRIVERS_INTEL_MIPI_CAMERA select DRIVERS_I2C_CS35L53 select SOC_INTEL_COMMON_BLOCK_IPU -- To view, visit https://review.coreboot.org/c/coreboot/+/76873?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I11afa9e8a1c8bf9f57bf6d195f07531182bd36f1 Gerrit-Change-Number: 76873 Gerrit-PatchSet: 1 Gerrit-Owner: Won Chung <wonchung(a)google.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[master]: soc/intel/meteorlake: Generate new TME key on each warm boot
by Pratikkumar V Prajapati (Code Review) 01 Aug '23

01 Aug '23

Attention is currently required from: Jakub Czapiga, Kapil Porwal, Ravishankar Sarawadi, Sridhar Siricilla, Subrata Banik, Tarun Tuli. Pratikkumar V Prajapati has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75627?usp=email ) Change subject: soc/intel/meteorlake: Generate new TME key on each warm boot ...................................................................... Patch Set 11: (1 comment) File src/soc/intel/meteorlake/Kconfig: https://review.coreboot.org/c/coreboot/+/75627/comment/76fd38e0_081d8bc0 : PS10, Line 31: select TME_KEY_REGENERATION_ON_WARM_BOOT > order please Done -- To view, visit https://review.coreboot.org/c/coreboot/+/75627?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3161ab99b83fb7765646be31978942f271ba1f9e Gerrit-Change-Number: 75627 Gerrit-PatchSet: 11 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Tue, 01 Aug 2023 19:36:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Set UPDs for TME exclusion range and new key gen
by Pratikkumar V Prajapati (Code Review) 01 Aug '23

01 Aug '23

Attention is currently required from: Jakub Czapiga, Kapil Porwal, Ravishankar Sarawadi, Sridhar Siricilla, Subrata Banik, Tarun Tuli. Pratikkumar V Prajapati has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75626?usp=email ) Change subject: soc/intel/meteorlake: Set UPDs for TME exclusion range and new key gen ...................................................................... Patch Set 15: (1 comment) File src/soc/intel/meteorlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/75626/comment/b269d620_3b76426a : PS14, Line 190: Excluding CBMEM region from TME encryption and new key " : "generation on warm boot not enabled > The control will reach here when the ram_top aka memory exclusion range is zero aka no range has bee […] Note that, if rom_top is invalid and we still program GenerateNewTmeKey then CBMEM will be encrypted as well. I think you agree with that based on your comment. -- To view, visit https://review.coreboot.org/c/coreboot/+/75626?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib8d33f470977ce8db2fd137bab9c63e325b4a32d Gerrit-Change-Number: 75626 Gerrit-PatchSet: 15 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Tue, 01 Aug 2023 19:35:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: soc/intel/meteorlake: Generate new TME key on each warm boot
by Pratikkumar V Prajapati (Code Review) 01 Aug '23

01 Aug '23

Attention is currently required from: Jakub Czapiga, Kapil Porwal, Pratikkumar V Prajapati, Ravishankar Sarawadi, Sridhar Siricilla, Tarun Tuli. Hello Jakub Czapiga, Kapil Porwal, Ravishankar Sarawadi, Sridhar Siricilla, Subrata Banik, Tarun Tuli, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75627?usp=email to look at the new patch set (#11). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/meteorlake: Generate new TME key on each warm boot ...................................................................... soc/intel/meteorlake: Generate new TME key on each warm boot Enable config TME_KEY_REGENERATION_ON_WARM_BOOT for Intel Meteor Lake SOCs. This config allows Intel FSP to programs TME engine to generate a new key for each warm boot and exclude CBMEM region from being encrypted by TME. Bug=b:276120526 TEST= Boot up the system, generate kernel crash using following commands: $ echo 1 > /proc/sys/kernel/sysrq $ echo "c" > /proc/sysrq-trigger System performs warm boot automatically. Once it is booted, execute following commands in linux console of the DUT and confirm ramoops can be read. $ cat /sys/fs/pstore/console-ramoops-0 S0ix also tested and found working. Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.com> Change-Id: I3161ab99b83fb7765646be31978942f271ba1f9e --- M src/soc/intel/meteorlake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/75627/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/75627?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3161ab99b83fb7765646be31978942f271ba1f9e Gerrit-Change-Number: 75627 Gerrit-PatchSet: 11 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit August 2023