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Change subject: cbfstool: Add relocation support for EFI binaries
......................................................................
Patch Set 4:
(1 comment)
File src/commonlib/fsp_relocate.c:
https://review.coreboot.org/c/coreboot/+/76762/comment/c8ffb5d4_7617570d :
PS3, Line 284: return 0;
> Excellent question: I could not find any reason why this function would return -1 on success but it […]
Thank you for the analysis. Split this change into a separate commit?
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Change subject: drivers/intel/gma/Kconfig: Add VBT compression configuration entry
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Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/76816/comment/038e980c_61683070 :
PS2, Line 12:
> The intention of that patch is to allow to pick a different compression algorithm. […]
I see. I’d start by describing the problem, that VBT is currently always LZMA compressed.
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Change subject: mb/emulation/qemu-riscv: Fix OpenSBI loading with working payload
......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/76572/comment/da3a8ea1_c7616122 :
PS3, Line 9: now
Please reference the commit.
Patchset:
PS3:
Welcome to coreboot!
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Change subject: payloads/edk2: Enable MMIO serial output for AMD Zen platforms
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Patch Set 3:
(1 comment)
Patchset:
PS3:
Nice work. If this is fixed in EDK2, please link to the commit.
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Change subject: mb/google/skyrim: Select ACPI_S1_NOT_SUPPORTED
......................................................................
Patch Set 4: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/76863/comment/5980cc5f_645ce693 :
PS3, Line 9: ACPI state S1 is not
: supported on Skyrim devices
> This is from b/263981434: […]
No idea, if this is wanted, but please add it to the commit message.
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Change subject: arch/x86: Adjust stack pointer to point to dummy argument
......................................................................
Patch Set 1:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/76878/comment/f5d429b6_b9dadf6a :
PS1, Line 8:
I’d start by describing the problem.
https://review.coreboot.org/c/coreboot/+/76878/comment/7533bd23_80bdc55c :
PS1, Line 10: as depthcharge picks the
: second element from top of the stack as coreboot table address
Please reference the source code file/line in depthcharge, where this is done.
https://review.coreboot.org/c/coreboot/+/76878/comment/9de3d938_a8417904 :
PS1, Line 16: TEST=Tested in simics environment.64bit coreboot could boot
: to OS.
Please add a space after the dot/period, and also everything fits into 72 characters.
File src/arch/x86/c_exit.S:
https://review.coreboot.org/c/coreboot/+/76878/comment/5ff33c61_24d24ad6 :
PS1, Line 34: pushl $0 /* Dummy argument */
Maybe mention depthcharge here too?
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Hello Arthur Heymans, Fred Reitberger, Zheng Bao, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/72959?usp=email
to look at the new patch set (#14).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: amdfwtool: Support firmware offsets of larger than 16MiB
......................................................................
amdfwtool: Support firmware offsets of larger than 16MiB
The mapped windows is up to 16M. Even if the flash size is 32MB, it is
not mapped at 0xFE000000.
So using "0xFFFFFFFF - rom_size + 1" to get the "rom_base_address" can
only explain well when rom_size is less or equal to 16MB. For larger
size, it is not physically correct (Even though it can get expected
result).
If the flash size is larger than 16M, we assume the given addresses
are already relative ones. So we don't need the physical base address
any more.
This commit is part of a series of patches to support 32/64M flash.
BUG=b:255374782
Change-Id: I9eea45f0be45a959c4150030e7e213923510ad68
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M util/amdfwtool/amdfwtool.c
1 file changed, 12 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/72959/14
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