coreboot-gerrit August 2023

coreboot-gerrit@coreboot.org

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6717 discussions

[M] Change in coreboot[master]: soc: Remove useless extern prototypes in .h files
by Arthur Heymans (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Christian Walter, Elyes Haouas, Fred Reitberger, Hung-Te Lin, Jakub Czapiga, Jason Glenesk, Jeff Daly, Johnny Lin, Julius Werner, Kapil Porwal, Matt DeVillier, Raul Rangel, Subrata Banik, Tarun Tuli, Tim Chu, Vanessa Eusebio, Yidi Lin, Yu-Ping Wu. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76859?usp=email ) Change subject: soc: Remove useless extern prototypes in .h files ...................................................................... Patch Set 1: Code-Review-2 (1 comment) Patchset: PS1: you should not declare variables inside headers. If you include the header in different places that will result in 2 separate variables with conflicting namespaces -- To view, visit https://review.coreboot.org/c/coreboot/+/76859?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1a2be199488f4a275dc2c60b4e5e0b111ef6d556 Gerrit-Change-Number: 76859 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Wed, 02 Aug 2023 05:29:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: acpi.c: Find FACS using 64bit address fields
by Lean Sheng Tan (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Arthur Heymans, Kyösti Mälkki, Lance Zhao. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76293?usp=email ) Change subject: acpi.c: Find FACS using 64bit address fields ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76293?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I406b9b470d6e76867e47cfda427b199e20cc9b32 Gerrit-Change-Number: 76293 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Aug 2023 05:28:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: acpi.c: Fill in >4G FADT entries correctly
by Lean Sheng Tan (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Arthur Heymans, Felix Held, Kyösti Mälkki, Lance Zhao, Nico Huber, Tim Wawrzynczak. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76179?usp=email ) Change subject: acpi.c: Fill in >4G FADT entries correctly ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76179?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84ab0068e8409a5e525ddc781347087680d80640 Gerrit-Change-Number: 76179 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 02 Aug 2023 05:27:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: acpi.c: Swap XSDT and RSDT for adding/finding tables
by Lean Sheng Tan (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Arthur Heymans, Felix Held, Kyösti Mälkki, Lance Zhao, Nico Huber, Subrata Banik. Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76000?usp=email ) Change subject: acpi.c: Swap XSDT and RSDT for adding/finding tables ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76000?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6588676186faa896b6076f871d7f8f633db21e70 Gerrit-Change-Number: 76000 Gerrit-PatchSet: 7 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 02 Aug 2023 05:26:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: 3rdparty/libgfxinit: Uprev to avoid new GCC 13 warning
by 9elements QA (Code Review) 02 Aug '23

02 Aug '23

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76868?usp=email ) Change subject: 3rdparty/libgfxinit: Uprev to avoid new GCC 13 warning ...................................................................... Patch Set 2: Automatic boot test returned (PASS/FAIL/TOTAL): 8 / 4 / 12 FAIL: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/175947 FAIL: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/175946 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/175945 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/175944 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/175943 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/175942 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/175941 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/175940 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/175939 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/175938 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/175937 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/175936 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/76868?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I908d5f2b98e2251a09c587d82b3e7fab55b338a2 Gerrit-Change-Number: 76868 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Aug 2023 05:15:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: linux_trampoline: Handle 64-bit framebuffer addresses
by Bill XIE (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Nico Huber. Bill XIE has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76479?usp=email ) Change subject: linux_trampoline: Handle 64-bit framebuffer addresses ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: Now this should no longer conflict with the last commit CB:76431. -- To view, visit https://review.coreboot.org/c/coreboot/+/76479?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib20184cf207f092062a91ac3e6aa819b956efd33 Gerrit-Change-Number: 76479 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Wed, 02 Aug 2023 05:13:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: amd/soc/common: Use relative offset for AMDFW
by Bao Zheng (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Paul Menzel, Raul Rangel, Zheng Bao. Hello Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Raul Rangel, Zheng Bao, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72961?usp=email to look at the new patch set (#15). Change subject: amd/soc/common: Use relative offset for AMDFW ...................................................................... amd/soc/common: Use relative offset for AMDFW The amdfw.rom is mostly in region COREBOOT. Calculate the relative address as the CBFS module address. That is for future 32M flash size support. TEST=binary identical test on amd/birman amd/majolica amd/gardenia amd/mayan amd/bilby amd/mandolin amd/chausie amd/pademelon pcengines/apu2 google/skyrim google/guybrush google/zork google/kahlee google/myst This commit is part of a series of patches to support 32/64M flash. BUG=b:255374782 Change-Id: I2add8e4e6755e582b3be6a150cf83d1468f2f1be Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/soc/amd/common/Makefile.inc 1 file changed, 9 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/72961/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/72961?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2add8e4e6755e582b3be6a150cf83d1468f2f1be Gerrit-Change-Number: 72961 Gerrit-PatchSet: 15 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[master]: util/amdfwtool: Deal with psp position in flash offset directly
by Bao Zheng (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Arthur Heymans, Felix Held, Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier, Raul Rangel, Zheng Bao. Hello Arthur Heymans, Felix Held, Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier, Raul Rangel, Zheng Bao, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/72939?usp=email to look at the new patch set (#25). Change subject: util/amdfwtool: Deal with psp position in flash offset directly ...................................................................... util/amdfwtool: Deal with psp position in flash offset directly It is based on work by Arthur Heymans, 69852. Get rid of the confusing "position index" and use the relative flash offset as the Kconfig setting instead. TEST=binary identical on amd/birman amd/majolica amd/gardenia amd/mayan amd/bilby amd/mandolin amd/chausie amd/pademelon pcengines/apu2 google/skyrim google/guybrush google/zork google/kahlee google/myst (The test should be done with INCLUDE_CONFIG_FILE=n) Change-Id: I26bde0b7c70efe9f5762109f431329ea7f95b7f2 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M configs/config.google_skyrim.no_video M configs/config.google_skyrim.with_binaries M src/mainboard/amd/chausie/Kconfig M src/mainboard/amd/majolica/Kconfig M src/mainboard/amd/mandolin/Kconfig M src/mainboard/google/guybrush/Kconfig M src/mainboard/google/kahlee/Kconfig M src/mainboard/google/skyrim/Kconfig M src/mainboard/google/zork/Kconfig M src/soc/amd/cezanne/Kconfig M src/soc/amd/cezanne/Makefile.inc M src/soc/amd/common/Makefile.inc M src/soc/amd/common/block/include/amdblocks/psp_efs.h M src/soc/amd/common/block/psp/Kconfig M src/soc/amd/glinda/Kconfig M src/soc/amd/glinda/Makefile.inc M src/soc/amd/mendocino/Kconfig M src/soc/amd/mendocino/Makefile.inc M src/soc/amd/phoenix/Kconfig M src/soc/amd/phoenix/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/amd/stoneyridge/fch.c 25 files changed, 125 insertions(+), 288 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/72939/25 -- To view, visit https://review.coreboot.org/c/coreboot/+/72939?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I26bde0b7c70efe9f5762109f431329ea7f95b7f2 Gerrit-Change-Number: 72939 Gerrit-PatchSet: 25 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: linux_trampoline: Handle 64-bit framebuffer addresses
by Bill XIE (Code Review) 02 Aug '23

02 Aug '23

Bill XIE has uploaded a new patch set (#2) to the change originally created by Nico Huber. ( https://review.coreboot.org/c/coreboot/+/76479?usp=email ) The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: linux_trampoline: Handle 64-bit framebuffer addresses ...................................................................... linux_trampoline: Handle 64-bit framebuffer addresses To support full 64-bit addresses, there is a new field `ext_lfb_base` since Linux 4.1. It is unclear, however, how a loader is supposed to know if the kernel is compatible with this. Filling these previously reserved bits doesn't hurt, but an old kernel would probably ignore them and not know that it's handling a clipped, invalid address. So we play safe, and only allow 64-bit addresses for kernels after the 2.15 version bump of the boot protocol. Change-Id: Ib20184cf207f092062a91ac3e6aa819b956efd33 Signed-off-by: Nico Huber <nico.h(a)gmx.de> Co-authored-by: Bill XIE <persmule(a)hardenedlinux.org> --- M util/cbfstool/cbfs-payload-linux.c M util/cbfstool/linux_trampoline.S M util/cbfstool/linux_trampoline.c 3 files changed, 31 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/76479/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/76479?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib20184cf207f092062a91ac3e6aa819b956efd33 Gerrit-Change-Number: 76479 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/intel/alderlake/chip.h: Use boolean type where applicable
by Michael Strosche (Code Review) 02 Aug '23

02 Aug '23

Attention is currently required from: Felix Singer, Subrata Banik, Tarun Tuli. Michael Strosche has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76830?usp=email ) Change subject: soc/intel/alderlake/chip.h: Use boolean type where applicable ...................................................................... Patch Set 2: (3 comments) File src/soc/intel/alderlake/chip.h: https://review.coreboot.org/c/coreboot/+/76830/comment/bf3df153_0542405e : PS1, Line 343: uint8_t > bool Correct, will also be changed. https://review.coreboot.org/c/coreboot/+/76830/comment/f1876681_7b0fbb14 : PS1, Line 463: uint8_t skip_ext_gfx_scan; > That should be bool. […] skip_ext_gfx_scan could also be removed for alderlake, because it is never used here. Only use (and definition) is for meteorlake. https://review.coreboot.org/c/coreboot/+/76830/comment/573c2cf8_86d4bcaa : PS1, Line 482: /* : * GSPIn Default Chip Select Mode: : * 0:Hardware Mode, : * 1:Software Mode : */ : bool serial_io_gspi_cs_mode[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX]; : /* : * GSPIn Default Chip Select State: : * 0: Low, : * 1: High : */ : bool serial_io_gspi_cs_state[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX]; > These could be a bool, but with the current attribute names it would be rather confusing. […] In devicetree the configuration values are already enum values (PchSerialIoDisabled, PchSerialIoPci). Because of this I also think it should stay with uint8_t here. -- To view, visit https://review.coreboot.org/c/coreboot/+/76830?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If26184058536590b70bbb03209913118307ff6c5 Gerrit-Change-Number: 76830 Gerrit-PatchSet: 2 Gerrit-Owner: Michael Strosche <michael.strosche(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Wed, 02 Aug 2023 05:06:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-MessageType: comment

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coreboot-gerrit August 2023