coreboot-gerrit June 2023

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: mb/google/rex: Enable ISH support
by Bernardo Perez Priego (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Bernardo Perez Priego, Boris Mittelberg, Caveh Jalali, Gwendal Grignou, Harsha B R, Jamie Ryu, Jay Patel, Kapil Porwal, Li1 Feng, Paul Menzel, Tarun Tuli, Vijay P Hiremath, Wonkyu Kim. Hello Boris Mittelberg, Caveh Jalali, Gwendal Grignou, Harsha B R, Jamie Ryu, Jay Patel, Kapil Porwal, Li1 Feng, Subrata Banik, Tanu Malhotra, Tanu Malhotra, Tarun Tuli, Vijay P Hiremath, Wonkyu Kim, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75039?usp=email to look at the new patch set (#15). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/google/rex: Enable ISH support ...................................................................... mb/google/rex: Enable ISH support Enable ISH based on FW_CONFIG obtained from EC CBI. This is useful in case device is a tablet and motion sensors are handled by ISH instead of EC. BUG=b:280329972,b:283023296 TEST= Set bit 21 of FW_CONFIG with CBI Boot rex board Check that ISH is enabled and loaded Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Change-Id: Ibe0e1b8ce2c9b08ac6b1e6fef9bd19afc9b4f59f --- M src/mainboard/google/rex/Kconfig M src/mainboard/google/rex/Kconfig.name M src/mainboard/google/rex/variants/rex0/overridetree.cb 3 files changed, 14 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/75039/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/75039?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe0e1b8ce2c9b08ac6b1e6fef9bd19afc9b4f59f Gerrit-Change-Number: 75039 Gerrit-PatchSet: 15 Gerrit-Owner: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-Reviewer: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jay Patel <jay2.patel(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Li1 Feng <li1.feng(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tanu Malhotra <tanu.malhotra(a)gmail.com> Gerrit-Reviewer: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Li1 Feng <li1.feng(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jay Patel <jay2.patel(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-Attention: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/rex: Enable ISH support
by Bernardo Perez Priego (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Bernardo Perez Priego, Boris Mittelberg, Caveh Jalali, Gwendal Grignou, Harsha B R, Jamie Ryu, Jay Patel, Kapil Porwal, Li1 Feng, Paul Menzel, Tarun Tuli, Vijay P Hiremath, Wonkyu Kim. Hello Boris Mittelberg, Caveh Jalali, Gwendal Grignou, Harsha B R, Jamie Ryu, Jay Patel, Kapil Porwal, Li1 Feng, Subrata Banik, Tanu Malhotra, Tanu Malhotra, Tarun Tuli, Vijay P Hiremath, Wonkyu Kim, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/75039?usp=email to look at the new patch set (#14). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/rex: Enable ISH support ...................................................................... mb/google/rex: Enable ISH support Enable ISH based on FW_CONFIG obtained from EC CBI. This is useful in case device is a tablet and motion sensors are handled by ISH instead of EC. BUG=b:280329972,b:283023296 TEST= Set bit 21 of FW_CONFIG with CBI Boot rex board Check that ISH is enabled and loaded Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Change-Id: Ibe0e1b8ce2c9b08ac6b1e6fef9bd19afc9b4f59f --- M src/mainboard/google/rex/Kconfig M src/mainboard/google/rex/Kconfig.name M src/mainboard/google/rex/variants/rex0/overridetree.cb 3 files changed, 15 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/75039/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/75039?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe0e1b8ce2c9b08ac6b1e6fef9bd19afc9b4f59f Gerrit-Change-Number: 75039 Gerrit-PatchSet: 14 Gerrit-Owner: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-Reviewer: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jay Patel <jay2.patel(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Li1 Feng <li1.feng(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tanu Malhotra <tanu.malhotra(a)gmail.com> Gerrit-Reviewer: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Li1 Feng <li1.feng(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jay Patel <jay2.patel(a)intel.com> Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-Attention: Gwendal Grignou <gwendal(a)chromium.org> Gerrit-Attention: Vijay P Hiremath <vijay.p.hiremath(a)intel.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[master]: mb/google/myst/bootblock.c: Initialize spi flash
by Fred Reitberger (Code Review) 02 Jun '23

02 Jun '23

Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75588?usp=email ) Change subject: mb/google/myst/bootblock.c: Initialize spi flash ...................................................................... mb/google/myst/bootblock.c: Initialize spi flash Initialize the SPI Flash in bootblock to ensure that CONFIG_SPI_FLASH_EXIT_4_BYTE_ADDR_MODE will exit 4-byte addressing mode. BUG=b:285110121 TEST=boot myst and verify flash operations work correctly Change-Id: Ia88d2b46884b096b4c558bc86513159ec6d35eb5 Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> --- M src/mainboard/google/myst/bootblock.c 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/75588/1 diff --git a/src/mainboard/google/myst/bootblock.c b/src/mainboard/google/myst/bootblock.c index 4404666..c12aeaa 100644 --- a/src/mainboard/google/myst/bootblock.c +++ b/src/mainboard/google/myst/bootblock.c @@ -3,7 +3,9 @@ #include <amdblocks/espi.h> #include <bootblock_common.h> #include <baseboard/variants.h> +#include <console/console.h> #include <soc/espi.h> +#include <spi_flash.h> void mb_set_up_early_espi(void) { @@ -35,4 +37,8 @@ variant_bootblock_gpio_table(&gpios, &num_gpios); gpio_configure_pads(gpios, num_gpios); + + // b:285110121 - temp workaround is to add a dummy flash call + const struct spi_flash *spi = boot_device_spi_flash(); + printk(BIOS_DEBUG, "Initialized spi flash %p\n", spi); } -- To view, visit https://review.coreboot.org/c/coreboot/+/75588?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia88d2b46884b096b4c558bc86513159ec6d35eb5 Gerrit-Change-Number: 75588 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[master]: drivers/spi/winbond.c: Add W25Q256JW_DTR part
by Fred Reitberger (Code Review) 02 Jun '23

02 Jun '23

Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75587?usp=email ) Change subject: drivers/spi/winbond.c: Add W25Q256JW_DTR part ...................................................................... drivers/spi/winbond.c: Add W25Q256JW_DTR part BUG=b:285110121 TEST=boot Myst and verify the flash is recognized Change-Id: I30aed5299f87f7cf02fe9a5569edd2b8dcf7b452 Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> --- M src/drivers/spi/winbond.c 1 file changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/75587/1 diff --git a/src/drivers/spi/winbond.c b/src/drivers/spi/winbond.c index 32bcc79..7992629 100644 --- a/src/drivers/spi/winbond.c +++ b/src/drivers/spi/winbond.c @@ -238,6 +238,15 @@ .protection_granularity_shift = 16, .bp_bits = 4, }, + { + /* W25Q256JW_DTR */ + .id[0] = 0x8019, + .nr_sectors_shift = 13, + .fast_read_dual_output_support = 1, + .fast_read_dual_io_support = 1, + .protection_granularity_shift = 16, + .bp_bits = 4, + }, }; /* -- To view, visit https://review.coreboot.org/c/coreboot/+/75587?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I30aed5299f87f7cf02fe9a5569edd2b8dcf7b452 Gerrit-Change-Number: 75587 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[master]: drivers/spi/spi_flash.c: Print the flash ID when find_match fails
by Fred Reitberger (Code Review) 02 Jun '23

02 Jun '23

Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75586?usp=email ) Change subject: drivers/spi/spi_flash.c: Print the flash ID when find_match fails ...................................................................... drivers/spi/spi_flash.c: Print the flash ID when find_match fails Print the flash ID codes when find_match fails to match the flash. BUG=b:285110121 Change-Id: I2106abfcfbd44c7d56d48ffbb43d8c76089af076 Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> --- M src/drivers/spi/spi_flash.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/75586/1 diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c index ea1b716..5182684 100644 --- a/src/drivers/spi/spi_flash.c +++ b/src/drivers/spi/spi_flash.c @@ -467,6 +467,7 @@ return fill_spi_flash(spi, flash, vi, part); } + printk(BIOS_WARNING, "SF: no match for ID %04x %04x\n", id[0], id[1]); return -1; } -- To view, visit https://review.coreboot.org/c/coreboot/+/75586?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2106abfcfbd44c7d56d48ffbb43d8c76089af076 Gerrit-Change-Number: 75586 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: mb/google/myst: Add PSP verstage callbacks
by Tim Van Patten (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Jon Murphy, Karthik Ramasubramanian, Raul Rangel. Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75585?usp=email ) Change subject: mb/google/myst: Add PSP verstage callbacks ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/75585?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc800e8bb27cc4c3fbccc2ab9f51138a7c4b03a6 Gerrit-Change-Number: 75585 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 01 Jun 2023 23:04:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc|vc/amd/phoenix: Prepare for PSP verstage
by Tim Van Patten (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Jon Murphy, Karthik Ramasubramanian, Matt DeVillier, Raul Rangel. Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75584?usp=email ) Change subject: soc|vc/amd/phoenix: Prepare for PSP verstage ...................................................................... Patch Set 1: Code-Review+1 (2 comments) Patchset: PS1: It looks like there is a lot of overlap with mendocino. Should we open a bug to collect these files into somewhere each chipset can share? Or are there subtle differences that make that kind of refactor difficult/impossible? File src/soc/amd/phoenix/psp_verstage/Makefile.inc: https://review.coreboot.org/c/coreboot/+/75584/comment/3bd79818_3eb1f276 : PS1, Line 3: ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y) `src/soc/amd/mendocino/psp_verstage/Makefile.inc` is slightly different than this. It always builds these files, except for gating `../../common/psp_verstage` with `CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK`. I would expect this `ifeq` to check `VBOOT_SEPARATE_VERSTAGE`, rather than when vboot runs. -- To view, visit https://review.coreboot.org/c/coreboot/+/75584?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6fbb1f835ac2ad6ff47f843321e1bd380af7ce33 Gerrit-Change-Number: 75584 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 01 Jun 2023 23:01:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[master]: libpayload/uhci: Re-write UHCI RH driver w/ generic_hub API
by Nico Huber (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Paul Menzel. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75504?usp=email ) Change subject: libpayload/uhci: Re-write UHCI RH driver w/ generic_hub API ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/75504/comment/b4bcfa9a_1c1141f7 : PS1, Line 21: > Do you have a QEMU line to test this? I couldn't get QEMU's `usb-kbd` driver working, but this combination hangs for me with a build from master: ``` CONFIG_BOARD_EMULATION_QEMU_X86_Q35=y CONFIG_PAYLOAD_FILO=y ``` `make qemu QEMU_ARGS="-device usb-mouse,bus=ich9-ehci-1.0,usb_version=1"` And shouldn't with the patches applied. The UHCI controllers act as companion controllers for the EHCI ones, hence the indirection and `usb_version=1`. -- To view, visit https://review.coreboot.org/c/coreboot/+/75504?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5211728775eb94dfc23fa82ebf00fe5c99039709 Gerrit-Change-Number: 75504 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 01 Jun 2023 22:50:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: vboot: Drop argument to select slot from `vb2ex_ec_protect()`
by Subrata Banik (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Yu-Ping Wu. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/75521?usp=email ) Change subject: vboot: Drop argument to select slot from `vb2ex_ec_protect()` ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: we need to land vboot CL first and uprev the submodule in coreboot to ensure V+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/75521?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2974f0cb43ba800c2aaeac4876ebaa052b5ee793 Gerrit-Change-Number: 75521 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 01 Jun 2023 22:32:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[master]: soc/amd/stoneyridge/acpi: rename sb_fch.asl to mmio.asl
by Felix Held (Code Review) 02 Jun '23

02 Jun '23

Attention is currently required from: Matt DeVillier. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75597?usp=email ) Change subject: soc/amd/stoneyridge/acpi: rename sb_fch.asl to mmio.asl ...................................................................... soc/amd/stoneyridge/acpi: rename sb_fch.asl to mmio.asl This file only contain the ACPI code describing the MMIO devices in the FCH, so rename it to mmio.asl. This also brings the Stoneyridge ACPI code a bit more in line with the ACPI code of the other SoCs. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Iccef1fc5230e3e104d8dea586a9cbaf894471c12 --- R src/soc/amd/stoneyridge/acpi/mmio.asl M src/soc/amd/stoneyridge/acpi/soc.asl 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/75597/1 diff --git a/src/soc/amd/stoneyridge/acpi/sb_fch.asl b/src/soc/amd/stoneyridge/acpi/mmio.asl similarity index 100% rename from src/soc/amd/stoneyridge/acpi/sb_fch.asl rename to src/soc/amd/stoneyridge/acpi/mmio.asl diff --git a/src/soc/amd/stoneyridge/acpi/soc.asl b/src/soc/amd/stoneyridge/acpi/soc.asl index 47d5992..6e67f5a 100644 --- a/src/soc/amd/stoneyridge/acpi/soc.asl +++ b/src/soc/amd/stoneyridge/acpi/soc.asl @@ -15,8 +15,8 @@ /* Describe PCI INT[A-H] for the Southbridge */ #include "pci_int.asl" -/* Describe the devices in the Southbridge */ -#include "sb_fch.asl" +/* Describe the MMIO devices in the FCH */ +#include "mmio.asl" /* Add GPIO library */ #include <soc/amd/common/acpi/gpio_bank_lib.asl> -- To view, visit https://review.coreboot.org/c/coreboot/+/75597?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccef1fc5230e3e104d8dea586a9cbaf894471c12 Gerrit-Change-Number: 75597 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-MessageType: newchange

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coreboot-gerrit June 2023